[Mlir-commits] [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op trait (PR #126886)

[Guray Ozen]

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@@ -2358,8 +2362,8 @@ def NVVM_WgmmaFenceAlignedOp : NVVM_Op<"wgmma.fence.aligned"> {
   }];
 }
 
-def NVVM_WgmmaGroupSyncAlignedOp : NVVM_Op<"wgmma.commit.group.sync.aligned">,
-  Arguments<(ins )> {
+def NVVM_WgmmaGroupSyncAlignedOp : NVVM_Op<"wgmma.commit.group.sync.aligned",  
+                              [NVVMRequiresSM<90, /*ArchAccelerated*/"true">]> {
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grypp wrote:

Should we mark at least all sm90? So we have at least a good test coverage 

https://github.com/llvm/llvm-project/pull/126886