[Mlir-commits] [mlir] [mlir][nvgpu] update commit group and wait async ops (PR #130482)
Guray Ozen
llvmlistbot at llvm.org
Fri Mar 14 11:55:14 PDT 2025
grypp wrote:
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> > When you break SSA semantic like following, is reordering the OPs allowed?
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> > ```
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> > nvgpu.device_async_create_group %0
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> > nvgpu.device_async_wait { numGroups = 1 : i32 }
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> > ```
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> It cannot be reordered, `nvgpu.device_async_wait` should be similar to gpu.barrier.
They should be reordered yes. But what stops the compiler to reorder them? When there was SSA semantic, the reordering wasn't possible.
https://github.com/llvm/llvm-project/pull/130482
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