[Mlir-commits] [mlir] [mlir][AMDGPU] Enable emulating vector buffer_atomic_fadd for bf16 on gfx942 (PR #129029)

[Matt Arsenault]

================
@@ -189,6 +189,14 @@ void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
     } else {
       target.addIllegalOp<RawBufferAtomicFmaxOp>();
     }
+    // gfx950 has bf16 atomics
+    if (chipset < Chipset(9, 5, 0)) {
----------------
arsenm wrote:

The example of the hip headers is a perfect example of why this is a terrible idea you should not be emulating. Those headers are a superfund site that should be purge of all target specific implementation details, particularly of the listing isa version variety 

https://github.com/llvm/llvm-project/pull/129029