[Mlir-commits] [mlir] [mlir][llvm] Add llvm.intr.exp10 operation (PR #129378)

Letu Ren llvmlistbot at llvm.org
Sat Mar 1 03:12:39 PST 2025


https://github.com/FantasqueX created https://github.com/llvm/llvm-project/pull/129378

None

>From 90ebe2e6db9a712c134be4da2cd7198d91cfe658 Mon Sep 17 00:00:00 2001
From: Letu Ren <fantasquex at gmail.com>
Date: Sat, 1 Mar 2025 19:11:53 +0800
Subject: [PATCH] [mlir][llvm] Add llvm.intr.exp10 operation

---
 mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td |  1 +
 mlir/test/Target/LLVMIR/Import/intrinsic.ll          | 11 +++++++++++
 mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir       |  9 +++++++++
 3 files changed, 21 insertions(+)

diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index aa6551eb43fa6..66d18954cf3e7 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -109,6 +109,7 @@ def LLVM_IsFPClass : LLVM_OneResultIntrOp<"is.fpclass", [], [0], [Pure],
 def LLVM_CopySignOp : LLVM_BinarySameArgsIntrOpF<"copysign">;
 def LLVM_ExpOp : LLVM_UnaryIntrOpF<"exp">;
 def LLVM_Exp2Op : LLVM_UnaryIntrOpF<"exp2">;
+def LLVM_Exp10Op : LLVM_UnaryIntrOpF<"exp10">;
 def LLVM_FAbsOp : LLVM_UnaryIntrOpF<"fabs">;
 def LLVM_FCeilOp : LLVM_UnaryIntrOpF<"ceil">;
 def LLVM_FFloorOp : LLVM_UnaryIntrOpF<"floor">;
diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
index d14fc8a5942ca..db7e606b06d12 100644
--- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -42,6 +42,15 @@ define void @exp2_test(float %0, <8 x float> %1) {
   ret void
 }
 
+; CHECK-LABEL:  llvm.func @exp10_test
+define void @exp10_test(float %0, <8 x float> %1) {
+  ; CHECK:  llvm.intr.exp10(%{{.*}}) : (f32) -> f32
+  %3 = call float @llvm.exp10.f32(float %0)
+  ; CHECK:  llvm.intr.exp10(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+  %4 = call <8 x float> @llvm.exp10.v8f32(<8 x float> %1)
+  ret void
+}
+
 ; CHECK-LABEL:  llvm.func @log_test
 define void @log_test(float %0, <8 x float> %1) {
   ; CHECK:  llvm.intr.log(%{{.*}}) : (f32) -> f32
@@ -1022,6 +1031,8 @@ declare float @llvm.exp.f32(float)
 declare <8 x float> @llvm.exp.v8f32(<8 x float>)
 declare float @llvm.exp2.f32(float)
 declare <8 x float> @llvm.exp2.v8f32(<8 x float>)
+declare float @llvm.exp10.f32(float)
+declare <8 x float> @llvm.exp10.v8f32(<8 x float>)
 declare float @llvm.log.f32(float)
 declare <8 x float> @llvm.log.v8f32(<8 x float>)
 declare float @llvm.log10.f32(float)
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index 0b47163cc51d3..82ee47a8c0a7b 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -40,6 +40,15 @@ llvm.func @exp2_test(%arg0: f32, %arg1: vector<8xf32>) {
   llvm.return
 }
 
+// CHECK-LABEL: @exp10_test
+llvm.func @exp10_test(%arg0: f32, %arg1: vector<8xf32>) {
+  // CHECK: call float @llvm.exp10.f32
+  "llvm.intr.exp10"(%arg0) : (f32) -> f32
+  // CHECK: call <8 x float> @llvm.exp10.v8f32
+  "llvm.intr.exp10"(%arg1) : (vector<8xf32>) -> vector<8xf32>
+  llvm.return
+}
+
 // CHECK-LABEL: @log_test
 llvm.func @log_test(%arg0: f32, %arg1: vector<8xf32>) {
   // CHECK: call float @llvm.log.f32



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