[Mlir-commits] [mlir] [MLIR][ArmNeon] Add a couple of negative tests for BFMMLA with scalable dimensions (PR #145882)

[llvmlistbot at llvm.org]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-neon

@llvm/pr-subscribers-mlir

Author: Momchil Velikov (momchil-velikov)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/145882.diff


1 Files Affected:

- (modified) mlir/test/Dialect/ArmNeon/invalid.mlir (+20) 


``````````diff
diff --git a/mlir/test/Dialect/ArmNeon/invalid.mlir b/mlir/test/Dialect/ArmNeon/invalid.mlir
index 989293a3508b4..00d489b639191 100644
--- a/mlir/test/Dialect/ArmNeon/invalid.mlir
+++ b/mlir/test/Dialect/ArmNeon/invalid.mlir
@@ -114,6 +114,16 @@ func.func @bfmmla_invalid_dimension_lhs_rhs(%acc: vector<4xf32>,
 
 // -----
 
+func.func @bfmmla_scalable_dimension_lhs_rhs(%acc: vector<4xf32>,
+                                             %lhs: vector<[8]xbf16>,
+                                             %rhs: vector<[8]xbf16>) -> vector<4xf32> {
+  // expected-error at +1 {{operand #1 must be a vector with length 8 of bfloat16 type values, but got 'vector<[8]xbf16>'}}
+  %0 = arm_neon.intr.bfmmla %acc, %lhs, %rhs : vector<[8]xbf16> to vector<4xf32>
+  return %0 : vector<4xf32>
+}
+
+// -----
+
 func.func @bfmmla_invalid_element_type_acc(%acc: vector<4xi32>,
                                            %lhs: vector<8xbf16>,
                                            %rhs: vector<8xbf16>) -> vector<4xi32> {
@@ -131,3 +141,13 @@ func.func @bfmmla_invalid_dimension_acc(%acc: vector<8xf32>,
   %0 = arm_neon.intr.bfmmla %acc, %lhs, %rhs : vector<8xbf16> to vector<8xf32>
   return %0 : vector<8xf32>
 }
+
+// -----
+
+func.func @bfmmla_scalable_dimension_acc(%acc: vector<[4]xf32>,
+                                         %lhs: vector<8xbf16>,
+                                         %rhs: vector<8xbf16>) -> vector<[4]xf32> {
+  // expected-error at +1 {{op operand #0 must be a vector with length 4 of 32-bit float values, but got 'vector<[4]xf32>'}}
+  %0 = arm_neon.intr.bfmmla %acc, %lhs, %rhs : vector<8xbf16> to vector<[4]xf32>
+  return %0 : vector<[4]xf32>
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/145882