[Mlir-commits] [mlir] [mlir][amdgpu][nfc] Add PatternBenefit to populate methods (PR #144663)

[Kunwar Grover]

https://github.com/Groverkss created https://github.com/llvm/llvm-project/pull/144663

None

>From 546dae9cbab7d69037100c2de17011740326d8c4 Mon Sep 17 00:00:00 2001
From: Kunwar Grover <groverkss at gmail.com>
Date: Wed, 18 Jun 2025 10:49:24 +0100
Subject: [PATCH] [mlir][amdgpu][nfc] Add PatternBenefit to populate methods

---
 mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h   | 10 +++++++---
 mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp  |  5 +++--
 .../AMDGPU/Transforms/ResolveStridedMetadata.cpp       |  4 ++--
 .../Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp   |  4 ++--
 4 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h b/mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
index 94dd9e3a29331..a52ee2ee89caf 100644
--- a/mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
+++ b/mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
@@ -14,6 +14,7 @@
 #define MLIR_DIALECT_AMDGPU_TRANSFORMS_PASSES_H_
 
 #include "mlir/Dialect/AMDGPU/Utils/Chipset.h"
+#include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
 
 namespace mlir {
@@ -28,11 +29,14 @@ namespace amdgpu {
 
 void populateAmdgpuEmulateAtomicsPatterns(ConversionTarget &target,
                                           RewritePatternSet &patterns,
-                                          Chipset chipset);
+                                          Chipset chipset,
+                                          PatternBenefit benefit = 1);
 
-void populateAmdgpuResolveStridedMetadataPatterns(RewritePatternSet &patterns);
+void populateAmdgpuResolveStridedMetadataPatterns(RewritePatternSet &patterns,
+                                                  PatternBenefit benefit = 1);
 
-void populateAmdgpuTransferReadToLoadPatterns(RewritePatternSet &patterns);
+void populateAmdgpuTransferReadToLoadPatterns(RewritePatternSet &patterns,
+                                              PatternBenefit benefit = 1);
 
 } // namespace amdgpu
 } // namespace mlir
diff --git a/mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp b/mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
index 7dd4be66d2bd6..fd2ba0683786e 100644
--- a/mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
+++ b/mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
@@ -164,7 +164,8 @@ LogicalResult RawBufferAtomicByCasPattern<AtomicOp, ArithOp>::matchAndRewrite(
 }
 
 void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
-    ConversionTarget &target, RewritePatternSet &patterns, Chipset chipset) {
+    ConversionTarget &target, RewritePatternSet &patterns, Chipset chipset,
+    PatternBenefit benefit) {
   // gfx10 has no atomic adds.
   if (chipset.majorVersion == 10 || chipset < Chipset(9, 0, 8)) {
     target.addIllegalOp<RawBufferAtomicFaddOp>();
@@ -204,7 +205,7 @@ void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
       RawBufferAtomicByCasPattern<RawBufferAtomicFmaxOp, arith::MaximumFOp>,
       RawBufferAtomicByCasPattern<RawBufferAtomicSmaxOp, arith::MaxSIOp>,
       RawBufferAtomicByCasPattern<RawBufferAtomicUminOp, arith::MinUIOp>>(
-      patterns.getContext());
+      patterns.getContext(), benefit);
 }
 
 void AmdgpuEmulateAtomicsPass::runOnOperation() {
diff --git a/mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp b/mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
index 4b3d94b4ce2ad..195f59d625554 100644
--- a/mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
+++ b/mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
@@ -66,9 +66,9 @@ struct ExtractStridedMetadataOnFatRawBufferCastFolder final
 } // namespace
 
 void mlir::amdgpu::populateAmdgpuResolveStridedMetadataPatterns(
-    RewritePatternSet &patterns) {
+    RewritePatternSet &patterns, PatternBenefit benefit) {
   patterns.add<ExtractStridedMetadataOnFatRawBufferCastFolder>(
-      patterns.getContext());
+      patterns.getContext(), benefit);
 }
 
 void AmdgpuResolveStridedMetadataPass::runOnOperation() {
diff --git a/mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp b/mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
index 96925dbf9f286..f5b12a9524cc9 100644
--- a/mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
+++ b/mlir/lib/Dialect/AMDGPU/Transforms/TransferReadToLoad.cpp
@@ -222,8 +222,8 @@ struct TransferReadLowering final : OpRewritePattern<vector::TransferReadOp> {
 } // namespace
 
 void mlir::amdgpu::populateAmdgpuTransferReadToLoadPatterns(
-    RewritePatternSet &patterns) {
-  patterns.add<TransferReadLowering>(patterns.getContext());
+    RewritePatternSet &patterns, PatternBenefit benefit) {
+  patterns.add<TransferReadLowering>(patterns.getContext(), benefit);
 }
 
 struct AmdgpuTransferReadToLoadPass final