[Mlir-commits] [mlir] [emitC]Pass in `mlir-opt` to wrap a func in class (PR #141158)

[Paul Kirth]

Valentin Clement =?utf-8?b?KOODkOODrOODsw=?=,Jaddyen <ajaden at google.com>,Jaddyen
 <ajaden at google.com>,Jaddyen <ajaden at google.com>,Jaddyen <ajaden at google.com>,Jaddyen
 <ajaden at google.com>,Jaddyen <ajaden at google.com>,Jaddyen <ajaden at google.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/141158 at github.com>


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@@ -0,0 +1,39 @@
+// RUN: mlir-opt --wrap-emitc-func-in-class='named-attribute=emitc.opaque' %s | FileCheck %s
+
+module attributes { } {
+  emitc.func @model(%arg0: !emitc.array<1xf32> {emitc.opaque = ["another_feature"]}, %arg1: !emitc.array<1xf32> {emitc.opaque = ["some_feature"]}, %arg2: !emitc.array<1xf32> {emitc.opaque = ["output_0"]}) attributes { } {
+    %0 = "emitc.constant"() <{value = 0 : index}> : () -> !emitc.size_t
+    %1 = subscript %arg1[%0] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
+    %2 = load %1 : <f32>
+    %3 = subscript %arg0[%0] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
+    %4 = load %3 : <f32>
+    %5 = add %2, %4 : (f32, f32) -> f32
+    %6 = subscript %arg2[%0] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
+    assign %5 : f32 to %6 : <f32>
+    return
+  }
+}
+
+
+// CHECK: module {
+// CHECK-NEXT:   emitc.class @modelClass {
+// CHECK-NEXT:     emitc.field @another_feature : !emitc.array<1xf32> = {emitc.opaque = ["another_feature"]}
+// CHECK-NEXT:     emitc.field @some_feature : !emitc.array<1xf32> = {emitc.opaque = ["some_feature"]}
+// CHECK-NEXT:     emitc.field @output_0 : !emitc.array<1xf32> = {emitc.opaque = ["output_0"]}
+// CHECK-NEXT:     emitc.func @execute() {
+// CHECK-NEXT:       %{{[0-9]+}} = "emitc.constant"() <{value = 0 : index}> : () -> !emitc.size_t
+// CHECK-NEXT:       %{{[0-9]+}} = get_field @another_feature : !emitc.array<1xf32>
+// CHECK-NEXT:       %{{[0-9]+}} = get_field @some_feature : !emitc.array<1xf32>
+// CHECK-NEXT:       %{{[0-9]+}} = get_field @output_0 : !emitc.array<1xf32>
+// CHECK-NEXT:       %{{[0-9]+}} = subscript %{{[0-9]+}}[%{{[0-9]+}}] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
+// CHECK-NEXT:       %{{[0-9]+}} = load %{{[0-9]+}} : <f32>
+// CHECK-NEXT:       %{{[0-9]+}} = subscript %{{[0-9]+}}[%{{[0-9]+}}] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
+// CHECK-NEXT:       %{{[0-9]+}} = load %{{[0-9]+}} : <f32>
+// CHECK-NEXT:       %{{[0-9]+}} = add %{{[0-9]+}}, %{{[0-9]+}} : (f32, f32) -> f32
+// CHECK-NEXT:       %{{[0-9]+}} = subscript %{{[0-9]+}}[%{{[0-9]+}}] : (!emitc.array<1xf32>, !emitc.size_t) -> !emitc.lvalue<f32>
----------------
ilovepi wrote:

If you're not matching the SSA values, you can drop them from your check line and just match the bit after `=`.

If you want to match all the IR, I think there is an update test check script for mlir that can autogenerate them for you, which may make it easier/nicer to update.

https://github.com/llvm/llvm-project/pull/141158