[Mlir-commits] [flang] [mlir] [flang][acc] Ensure all acc.loop get a default parallelism determination mode (PR #143623)
Razvan Lupusoru
llvmlistbot at llvm.org
Tue Jun 10 20:16:47 PDT 2025
https://github.com/razvanlupusoru updated https://github.com/llvm/llvm-project/pull/143623
>From 3f1c74356e3c78d70765284d9c573064a66a30ca Mon Sep 17 00:00:00 2001
From: Razvan Lupusoru <rlupusoru at nvidia.com>
Date: Tue, 10 Jun 2025 15:47:28 -0700
Subject: [PATCH 1/4] [flang][acc] Ensure all acc.loop get a default
parallelism mode
This PR updates the flang lowering to explicitly implement the OpenACC
rules:
- As per OpenACC 3.3 standard section 2.9.6 independent clause:
A loop construct with no auto or seq clause is treated as if it has
the independent clause when it is an orphaned loop construct or its
parent compute construct is a parallel construct.
- As per OpenACC 3.3 standard section 2.9.7 auto clause:
When the parent compute construct is a kernels construct, a loop
construct with no independent or seq clause is treated as if it has
the auto clause.
- Loops in serial regions are `seq` if they have no other parallelism
marking such as gang, worker, vector.
For now the `acc.loop` verifier has not yet been updated to enforce
this.
---
flang/lib/Lower/OpenACC.cpp | 57 +++++++++++++++++++
flang/test/Lower/OpenACC/acc-kernels-loop.f90 | 28 ++++-----
flang/test/Lower/OpenACC/acc-loop.f90 | 52 ++++++++---------
.../test/Lower/OpenACC/acc-parallel-loop.f90 | 28 ++++-----
flang/test/Lower/OpenACC/acc-serial-loop.f90 | 10 ++--
mlir/include/mlir/Dialect/OpenACC/OpenACC.h | 6 ++
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 11 ++++
7 files changed, 133 insertions(+), 59 deletions(-)
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index 02dba22c29c7f..11e99d100f31c 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -2150,6 +2150,60 @@ privatizeIv(Fortran::lower::AbstractConverter &converter,
ivPrivate.push_back(privateValue);
}
+static void determineDefaultLoopParMode(
+ Fortran::lower::AbstractConverter &converter, mlir::acc::LoopOp &loopOp,
+ llvm::SmallVector<mlir::Attribute> &seqDeviceTypes,
+ llvm::SmallVector<mlir::Attribute> &independentDeviceTypes,
+ llvm::SmallVector<mlir::Attribute> &autoDeviceTypes) {
+ auto hasDeviceNone = [](mlir::Attribute attr) -> bool {
+ return mlir::dyn_cast<mlir::acc::DeviceTypeAttr>(attr).getValue() ==
+ mlir::acc::DeviceType::None;
+ };
+ bool hasDefaultSeq = llvm::any_of(seqDeviceTypes, hasDeviceNone);
+ bool hasDefaultIndependent =
+ llvm::any_of(independentDeviceTypes, hasDeviceNone);
+ bool hasDefaultAuto = llvm::any_of(autoDeviceTypes, hasDeviceNone);
+ if (hasDefaultSeq || hasDefaultIndependent || hasDefaultAuto)
+ return; // Default loop par mode is already specified.
+
+ mlir::Region *currentRegion =
+ converter.getFirOpBuilder().getBlock()->getParent();
+ mlir::Operation *parentOp = mlir::acc::getEnclosingComputeOp(*currentRegion);
+ const bool isOrphanedLoop = !parentOp;
+ if (isOrphanedLoop ||
+ mlir::isa_and_present<mlir::acc::ParallelOp>(parentOp)) {
+ // As per OpenACC 3.3 standard section 2.9.6 independent clause:
+ // A loop construct with no auto or seq clause is treated as if it has the
+ // independent clause when it is an orphaned loop construct or its parent
+ // compute construct is a parallel construct.
+ independentDeviceTypes.push_back(mlir::acc::DeviceTypeAttr::get(
+ converter.getFirOpBuilder().getContext(), mlir::acc::DeviceType::None));
+ } else if (mlir::isa_and_present<mlir::acc::SerialOp>(parentOp)) {
+ // Serial construct implies `seq` clause on loop. However, this
+ // conflicts with parallelism assignment if already set. Therefore check
+ // that first.
+ bool hasDefaultGangWorkerOrVector =
+ loopOp.hasVector() || loopOp.getVectorValue() || loopOp.hasWorker() ||
+ loopOp.getWorkerValue() || loopOp.hasGang() ||
+ loopOp.getGangValue(mlir::acc::GangArgType::Num) ||
+ loopOp.getGangValue(mlir::acc::GangArgType::Dim) ||
+ loopOp.getGangValue(mlir::acc::GangArgType::Static);
+ if (!hasDefaultGangWorkerOrVector)
+ seqDeviceTypes.push_back(mlir::acc::DeviceTypeAttr::get(
+ converter.getFirOpBuilder().getContext(),
+ mlir::acc::DeviceType::None));
+ } else {
+ // As per OpenACC 3.3 standard section 2.9.7 auto clause:
+ // When the parent compute construct is a kernels construct, a loop
+ // construct with no independent or seq clause is treated as if it has the
+ // auto clause.
+ assert(mlir::isa_and_present<mlir::acc::KernelsOp>(parentOp) &&
+ "Expected kernels construct");
+ autoDeviceTypes.push_back(mlir::acc::DeviceTypeAttr::get(
+ converter.getFirOpBuilder().getContext(), mlir::acc::DeviceType::None));
+ }
+}
+
static mlir::acc::LoopOp createLoopOp(
Fortran::lower::AbstractConverter &converter,
mlir::Location currentLocation,
@@ -2482,6 +2536,9 @@ static mlir::acc::LoopOp createLoopOp(
loopOp.setTileOperandsSegmentsAttr(
builder.getDenseI32ArrayAttr(tileOperandsSegments));
+ // Determine the loop's default par mode - either seq, independent, or auto.
+ determineDefaultLoopParMode(converter, loopOp, seqDeviceTypes,
+ independentDeviceTypes, autoDeviceTypes);
if (!seqDeviceTypes.empty())
loopOp.setSeqAttr(builder.getArrayAttr(seqDeviceTypes));
if (!independentDeviceTypes.empty())
diff --git a/flang/test/Lower/OpenACC/acc-kernels-loop.f90 b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
index 8608b0ad98ce6..4e968144399a8 100644
--- a/flang/test/Lower/OpenACC/acc-kernels-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-kernels-loop.f90
@@ -47,7 +47,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {
! CHECK: acc.loop private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -59,7 +59,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels combined(loop) {
! CHECK: acc.loop combined(kernels) private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -490,7 +490,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {{.*}} {
! CHECK: acc.loop {{.*}} gang {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -503,7 +503,7 @@ subroutine acc_kernels_loop
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM1]] : i32}) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -516,7 +516,7 @@ subroutine acc_kernels_loop
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM2]] : i32}) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -528,7 +528,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {{.*}} {
! CHECK: acc.loop {{.*}} gang({num=%{{.*}} : i32, static=%{{.*}} : i32})
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -540,7 +540,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {{.*}} {
! CHECK: acc.loop {{.*}} vector {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -553,7 +553,7 @@ subroutine acc_kernels_loop
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop {{.*}} vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -566,7 +566,7 @@ subroutine acc_kernels_loop
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop {{.*}} vector([[VECTORLENGTH]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -578,7 +578,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {{.*}} {
! CHECK: acc.loop {{.*}} worker {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -591,7 +591,7 @@ subroutine acc_kernels_loop
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop {{.*}} worker([[WORKER128]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -605,7 +605,7 @@ subroutine acc_kernels_loop
! CHECK: acc.kernels {{.*}} {
! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
+! CHECK-NEXT: } attributes {{{.*}}collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
@@ -621,9 +621,9 @@ subroutine acc_kernels_loop
! CHECK: acc.loop {{.*}} {
! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.terminator
! CHECK-NEXT: }{{$}}
diff --git a/flang/test/Lower/OpenACC/acc-loop.f90 b/flang/test/Lower/OpenACC/acc-loop.f90
index 0246f60705898..eca7fb30da8fa 100644
--- a/flang/test/Lower/OpenACC/acc-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-loop.f90
@@ -29,7 +29,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}{{$}}
!$acc loop seq
DO i = 1, n
@@ -65,7 +65,7 @@ program acc_loop
! CHECK: acc.loop gang private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang(num: 8)
DO i = 1, n
@@ -75,7 +75,7 @@ program acc_loop
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
! CHECK: acc.loop gang({num=[[GANGNUM1]] : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang(num: gangNum)
DO i = 1, n
@@ -85,7 +85,7 @@ program acc_loop
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop gang({num=[[GANGNUM2]] : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang(num: gangNum, static: gangStatic)
DO i = 1, n
@@ -94,7 +94,7 @@ program acc_loop
! CHECK: acc.loop gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop vector
DO i = 1, n
@@ -103,7 +103,7 @@ program acc_loop
! CHECK: acc.loop vector private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop vector(128)
DO i = 1, n
@@ -113,7 +113,7 @@ program acc_loop
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop vector([[CONSTANT128]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop vector(vectorLength)
DO i = 1, n
@@ -123,7 +123,7 @@ program acc_loop
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop vector([[VECTORLENGTH]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop worker
DO i = 1, n
@@ -132,7 +132,7 @@ program acc_loop
! CHECK: acc.loop worker private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop worker(128)
DO i = 1, n
@@ -142,7 +142,7 @@ program acc_loop
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop worker([[WORKER128]] : i32) private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop private(c)
DO i = 1, n
@@ -151,7 +151,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
! When the induction variable is explicitly private - only a single private entry should be created.
!$acc loop private(i)
@@ -161,7 +161,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop private(c, d)
DO i = 1, n
@@ -170,7 +170,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop private(c) private(d)
DO i = 1, n
@@ -179,7 +179,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop tile(2)
DO i = 1, n
@@ -189,7 +189,7 @@ program acc_loop
! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop tile(*)
DO i = 1, n
@@ -198,7 +198,7 @@ program acc_loop
! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop tile(2, 2)
DO i = 1, n
@@ -211,7 +211,7 @@ program acc_loop
! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop tile(tileSize)
DO i = 1, n
@@ -220,7 +220,7 @@ program acc_loop
! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop tile(tileSize, tileSize)
DO i = 1, n
@@ -231,7 +231,7 @@ program acc_loop
! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: }{{$}}
!$acc loop collapse(2)
DO i = 1, n
@@ -244,7 +244,7 @@ program acc_loop
! CHECK: fir.store %arg0 to %{{.*}} : !fir.ref<i32>
! CHECK: fir.store %arg1 to %{{.*}} : !fir.ref<i32>
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
!$acc loop
DO i = 1, n
@@ -257,9 +257,9 @@ program acc_loop
! CHECK: acc.loop {{.*}} control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.loop {{.*}} control(%arg1 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop reduction(+:reduction_r) reduction(*:reduction_i)
do i = 1, n
@@ -269,7 +269,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang(dim: gangDim, static: gangStatic)
DO i = 1, n
@@ -278,7 +278,7 @@ program acc_loop
! CHECK: acc.loop gang({dim=%{{.*}}, static=%{{.*}} : i32}) {{.*}} control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop gang(dim: 1)
DO i = 1, n
@@ -287,7 +287,7 @@ program acc_loop
! CHECK: acc.loop gang({dim={{.*}} : i32}) {{.*}} control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop
DO i = 1, n
@@ -335,4 +335,4 @@ subroutine sub1(i, j, k)
! CHECK: %[[P_J:.*]] = acc.private varPtr(%[[DC_J]] : !fir.ref<i32>) -> !fir.ref<i32> {implicit = true, name = "j"}
! CHECK: %[[P_K:.*]] = acc.private varPtr(%[[DC_K]] : !fir.ref<i32>) -> !fir.ref<i32> {implicit = true, name = "k"}
! CHECK: acc.loop combined(parallel) private(@privatization_ref_i32 -> %[[P_I]] : !fir.ref<i32>, @privatization_ref_i32 -> %[[P_J]] : !fir.ref<i32>, @privatization_ref_i32 -> %[[P_K]] : !fir.ref<i32>) control(%{{.*}} : i32, %{{.*}} : i32, %{{.*}} : i32) = (%c1{{.*}}, %c1{{.*}}, %c1{{.*}} : i32, i32, i32) to (%c10{{.*}}, %c100{{.*}}, %c200{{.*}} : i32, i32, i32) step (%c1{{.*}}, %c1{{.*}}, %c1{{.*}} : i32, i32, i32)
-! CHECK: } attributes {inclusiveUpperbound = array<i1: true, true, true>}
+! CHECK: } attributes {inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
diff --git a/flang/test/Lower/OpenACC/acc-parallel-loop.f90 b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
index 4cf268d2517f5..32060179acdf1 100644
--- a/flang/test/Lower/OpenACC/acc-parallel-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-parallel-loop.f90
@@ -49,7 +49,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {
! CHECK: acc.loop private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -61,7 +61,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel combined(loop) {
! CHECK: acc.loop combined(parallel) private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -505,7 +505,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {{.*}} {
! CHECK: acc.loop {{.*}} gang
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -518,7 +518,7 @@ subroutine acc_parallel_loop
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM1]] : i32})
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -531,7 +531,7 @@ subroutine acc_parallel_loop
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM2]] : i32})
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -543,7 +543,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {{.*}} {
! CHECK: acc.loop {{.*}} gang({num=%{{.*}} : i32, static=%{{.*}} : i32})
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -555,7 +555,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {{.*}} {
! CHECK: acc.loop {{.*}} vector
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -568,7 +568,7 @@ subroutine acc_parallel_loop
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop {{.*}} vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -582,7 +582,7 @@ subroutine acc_parallel_loop
! CHECK: acc.loop {{.*}} vector([[VECTORLENGTH]] : i32) {{.*}} {
! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -595,7 +595,7 @@ subroutine acc_parallel_loop
! CHECK: acc.loop {{.*}} worker {{.*}} {
! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -609,7 +609,7 @@ subroutine acc_parallel_loop
! CHECK: acc.loop {{.*}} worker([[WORKER128]] : i32) {{.*}} {
! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -623,7 +623,7 @@ subroutine acc_parallel_loop
! CHECK: acc.parallel {{.*}} {
! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
+! CHECK-NEXT: } attributes {{{.*}}collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -639,9 +639,9 @@ subroutine acc_parallel_loop
! CHECK: acc.loop {{.*}} {
! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}independent = [#acc.device_type<none>]}
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}independent = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
diff --git a/flang/test/Lower/OpenACC/acc-serial-loop.f90 b/flang/test/Lower/OpenACC/acc-serial-loop.f90
index 34391f78ae707..f7b8ffad13393 100644
--- a/flang/test/Lower/OpenACC/acc-serial-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-serial-loop.f90
@@ -68,7 +68,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {
! CHECK: acc.loop private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}seq = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -80,7 +80,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial combined(loop) {
! CHECK: acc.loop combined(serial) private{{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}seq = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -562,7 +562,7 @@ subroutine acc_serial_loop
! CHECK: acc.loop {{.*}} {
! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true>}
+! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -578,9 +578,9 @@ subroutine acc_serial_loop
! CHECK: acc.loop {{.*}} {
! CHECK: acc.loop {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}seq = [#acc.device_type<none>]}
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {{{.*}}seq = [#acc.device_type<none>]}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACC.h b/mlir/include/mlir/Dialect/OpenACC/OpenACC.h
index ff5845343313c..4eb666239d4e4 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACC.h
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACC.h
@@ -151,6 +151,12 @@ mlir::ValueRange getDataOperands(mlir::Operation *accOp);
/// Used to get a mutable range iterating over the data operands.
mlir::MutableOperandRange getMutableDataOperands(mlir::Operation *accOp);
+/// Used to obtain the enclosing compute construct operation that contains
+/// the provided `region`. Returns nullptr if no compute construct operation
+/// is found. The returns operation is one of types defined by
+///`ACC_COMPUTE_CONSTRUCT_OPS`.
+mlir::Operation *getEnclosingComputeOp(mlir::Region ®ion);
+
/// Used to check whether the provided `type` implements the `PointerLikeType`
/// interface.
inline bool isPointerLikeType(mlir::Type type) {
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index 658ad28477ace..c72ec47be9f04 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -3820,3 +3820,14 @@ mlir::acc::getMutableDataOperands(mlir::Operation *accOp) {
.Default([&](mlir::Operation *) { return nullptr; })};
return dataOperands;
}
+
+mlir::Operation *mlir::acc::getEnclosingComputeOp(mlir::Region ®ion) {
+ mlir::Operation *parentOp = region.getParentOp();
+ while (parentOp) {
+ if (mlir::isa<ACC_COMPUTE_CONSTRUCT_OPS>(parentOp)) {
+ return parentOp;
+ }
+ parentOp = parentOp->getParentOp();
+ }
+ return nullptr;
+}
>From e17959a94612714a956242c72f0a1c6dbbbb8208 Mon Sep 17 00:00:00 2001
From: Razvan Lupusoru <rlupusoru at nvidia.com>
Date: Tue, 10 Jun 2025 20:06:37 -0700
Subject: [PATCH 2/4] Deal with serial loop with parallelism marking
---
flang/lib/Lower/OpenACC.cpp | 10 +++
flang/test/Lower/OpenACC/acc-serial-loop.f90 | 20 +++---
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 34 ++++++++--
mlir/test/Dialect/OpenACC/canonicalize.mlir | 4 +-
mlir/test/Dialect/OpenACC/invalid.mlir | 28 ++++-----
mlir/test/Dialect/OpenACC/legalize-data.mlir | 16 ++---
mlir/test/Dialect/OpenACC/ops.mlir | 66 ++++++++++----------
7 files changed, 106 insertions(+), 72 deletions(-)
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index 11e99d100f31c..89121cb681822 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -2192,6 +2192,16 @@ static void determineDefaultLoopParMode(
seqDeviceTypes.push_back(mlir::acc::DeviceTypeAttr::get(
converter.getFirOpBuilder().getContext(),
mlir::acc::DeviceType::None));
+ // Since the loop has some parallelism assigned - we cannot assign `seq`.
+ // However, the `acc.loop` verifier will check that one of seq, independent,
+ // or auto is marked. Seems reasonable to mark as auto since the OpenACC
+ // spec does say "If not, or if it is unable to make a determination, it
+ // must treat the auto clause as if it is a seq clause, and it must
+ // ignore any gang, worker, or vector clauses on the loop construct"
+ else
+ autoDeviceTypes.push_back(mlir::acc::DeviceTypeAttr::get(
+ converter.getFirOpBuilder().getContext(),
+ mlir::acc::DeviceType::None));
} else {
// As per OpenACC 3.3 standard section 2.9.7 auto clause:
// When the parent compute construct is a kernels construct, a loop
diff --git a/flang/test/Lower/OpenACC/acc-serial-loop.f90 b/flang/test/Lower/OpenACC/acc-serial-loop.f90
index f7b8ffad13393..af7bb0fac158c 100644
--- a/flang/test/Lower/OpenACC/acc-serial-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-serial-loop.f90
@@ -446,7 +446,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {{.*}} {
! CHECK: acc.loop {{.*}} gang {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -459,7 +459,7 @@ subroutine acc_serial_loop
! CHECK: [[GANGNUM1:%.*]] = arith.constant 8 : i32
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM1]] : i32}) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -472,7 +472,7 @@ subroutine acc_serial_loop
! CHECK: [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop {{.*}} gang({num=[[GANGNUM2]] : i32}) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -484,7 +484,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {{.*}} {
! CHECK: acc.loop {{.*}} gang({num=%{{.*}} : i32, static=%{{.*}} : i32}) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -496,7 +496,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {{.*}} {
! CHECK: acc.loop {{.*}} vector {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -509,7 +509,7 @@ subroutine acc_serial_loop
! CHECK: [[CONSTANT128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop {{.*}} vector([[CONSTANT128]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -522,7 +522,7 @@ subroutine acc_serial_loop
! CHECK: [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
! CHECK: acc.loop {{.*}} vector([[VECTORLENGTH]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -534,7 +534,7 @@ subroutine acc_serial_loop
! CHECK: acc.serial {{.*}} {
! CHECK: acc.loop {{.*}} worker {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -547,7 +547,7 @@ subroutine acc_serial_loop
! CHECK: [[WORKER128:%.*]] = arith.constant 128 : i32
! CHECK: acc.loop {{.*}} worker([[WORKER128]] : i32) {{.*}} {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {auto_ = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
@@ -562,7 +562,7 @@ subroutine acc_serial_loop
! CHECK: acc.loop {{.*}} {
! CHECK-NOT: fir.do_loop
! CHECK: acc.yield
-! CHECK-NEXT: } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
+! CHECK-NEXT: } attributes {{{.*}}collapse = [2], collapseDeviceType = [#acc.device_type<none>]{{.*}}}
! CHECK: acc.yield
! CHECK-NEXT: }{{$}}
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index c72ec47be9f04..de378a921a7af 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -2461,10 +2461,34 @@ LogicalResult acc::LoopOp::verify() {
if (hasDuplicateDeviceTypes(getAuto_(), deviceTypes) ||
hasDuplicateDeviceTypes(getIndependent(), deviceTypes) ||
hasDuplicateDeviceTypes(getSeq(), deviceTypes)) {
- return emitError() << "only one of \"" << acc::LoopOp::getAutoAttrStrName()
- << "\", " << getIndependentAttrName() << ", "
- << getSeqAttrName()
- << " can be present at the same time";
+ return emitError() << "only one of auto, independent, seq can be present "
+ "at the same time";
+ }
+
+ // Check that at least one of auto, independent, or seq is present
+ // for the device-independent default clauses.
+ auto hasDeviceNone = [](mlir::acc::DeviceTypeAttr attr) -> bool {
+ return attr.getValue() == mlir::acc::DeviceType::None;
+ };
+ bool hasDefaultSeq =
+ getSeqAttr()
+ ? llvm::any_of(getSeqAttr().getAsRange<mlir::acc::DeviceTypeAttr>(),
+ hasDeviceNone)
+ : false;
+ bool hasDefaultIndependent =
+ getIndependentAttr()
+ ? llvm::any_of(
+ getIndependentAttr().getAsRange<mlir::acc::DeviceTypeAttr>(),
+ hasDeviceNone)
+ : false;
+ bool hasDefaultAuto =
+ getAuto_Attr()
+ ? llvm::any_of(getAuto_Attr().getAsRange<mlir::acc::DeviceTypeAttr>(),
+ hasDeviceNone)
+ : false;
+ if (!hasDefaultSeq && !hasDefaultIndependent && !hasDefaultAuto) {
+ return emitError()
+ << "at least one of auto, independent, seq must be present";
}
// Gang, worker and vector are incompatible with seq.
@@ -2483,7 +2507,7 @@ LogicalResult acc::LoopOp::verify() {
getGangValue(mlir::acc::GangArgType::Static,
deviceTypeAttr.getValue()))
return emitError()
- << "gang, worker or vector cannot appear with the seq attr";
+ << "gang, worker or vector cannot appear with seq";
}
}
diff --git a/mlir/test/Dialect/OpenACC/canonicalize.mlir b/mlir/test/Dialect/OpenACC/canonicalize.mlir
index e43a27f6b9e89..fdc8e6b5cae6e 100644
--- a/mlir/test/Dialect/OpenACC/canonicalize.mlir
+++ b/mlir/test/Dialect/OpenACC/canonicalize.mlir
@@ -116,10 +116,10 @@ func.func @testhostdataop(%a: memref<f32>, %ifCond: i1) -> () {
acc.host_data dataOperands(%0 : memref<f32>) if(%false) {
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes { inclusiveUpperbound = array<i1: true> }
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes { inclusiveUpperbound = array<i1: true> }
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.terminator
}
return
diff --git a/mlir/test/Dialect/OpenACC/invalid.mlir b/mlir/test/Dialect/OpenACC/invalid.mlir
index aadf189273212..8f6e961a06163 100644
--- a/mlir/test/Dialect/OpenACC/invalid.mlir
+++ b/mlir/test/Dialect/OpenACC/invalid.mlir
@@ -2,7 +2,7 @@
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -12,7 +12,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -22,7 +22,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -32,7 +32,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -42,7 +42,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -52,7 +52,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -62,7 +62,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
+// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
acc.loop {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -72,7 +72,7 @@ acc.loop {
// expected-error at +1 {{expected non-empty body.}}
acc.loop {
-}
+} attributes {independent = [#acc.device_type<none>]}
// -----
@@ -99,7 +99,7 @@ acc.loop {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{only one of "auto", "independent", "seq" can be present at the same time}}
+// expected-error at +1 {{only one of auto, independent, seq can be present at the same time}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
} attributes {auto_ = [#acc.device_type<none>], seq = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
@@ -168,7 +168,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32){
// expected-error at +1 {{'acc.init' op cannot be nested in a compute operation}}
acc.init
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>}
+} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// -----
@@ -186,7 +186,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
// expected-error at +1 {{'acc.shutdown' op cannot be nested in a compute operation}}
acc.shutdown
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>}
+} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// -----
@@ -198,7 +198,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.shutdown
}) : () -> ()
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>}
+} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// -----
@@ -797,7 +797,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>] }
+ } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
return
}
@@ -816,6 +816,6 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>] }
+ } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
return
}
diff --git a/mlir/test/Dialect/OpenACC/legalize-data.mlir b/mlir/test/Dialect/OpenACC/legalize-data.mlir
index 28ef6761a6ef4..40604dcc736de 100644
--- a/mlir/test/Dialect/OpenACC/legalize-data.mlir
+++ b/mlir/test/Dialect/OpenACC/legalize-data.mlir
@@ -96,7 +96,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- }
+ } attributes {independent = [#acc.device_type<none>]}
acc.yield
}
return
@@ -109,7 +109,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[CREATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: }
+// CHECK: } attributes {independent = [#acc.device_type<none>]}
// CHECK: acc.yield
// CHECK: }
@@ -134,7 +134,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- }
+ } attributes {independent = [#acc.device_type<none>]}
acc.yield
}
return
@@ -147,7 +147,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: }
+// CHECK: } attributes {independent = [#acc.device_type<none>]}
// CHECK: acc.yield
// CHECK: }
@@ -172,7 +172,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop private(@privatization_memref_10_f32 -> %p1 : memref<10xf32>) control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- }
+ } attributes {independent = [#acc.device_type<none>]}
acc.yield
}
return
@@ -185,7 +185,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop private(@privatization_memref_10_f32 -> %[[PRIVATE]] : memref<10xf32>) control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: }
+// CHECK: } attributes {independent = [#acc.device_type<none>]}
// CHECK: acc.yield
// CHECK: }
@@ -210,7 +210,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- }
+ } attributes {seq = [#acc.device_type<none>]}
acc.yield
}
return
@@ -223,7 +223,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: }
+// CHECK: } attributes {seq = [#acc.device_type<none>]}
// CHECK: acc.yield
// CHECK: }
diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir
index 550f295f074a2..97278f869534b 100644
--- a/mlir/test/Dialect/OpenACC/ops.mlir
+++ b/mlir/test/Dialect/OpenACC/ops.mlir
@@ -19,7 +19,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
%co = arith.addf %cij, %p : f32
memref.store %co, %C[%arg3, %arg4] : memref<10x10xf32>
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>}
+ } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
acc.yield
}
@@ -40,7 +40,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>}
+// CHECK-NEXT: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
@@ -129,7 +129,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%tmp = arith.addf %axy, %bxy : f32
memref.store %tmp, %c[%y] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
// for i = 0 to 10 step 1
@@ -139,9 +139,9 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%z = arith.addf %ci, %dx : f32
memref.store %z, %d[%x] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<nvidia>]}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.yield
}
acc.terminator
@@ -166,16 +166,16 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// CHECK-NEXT: acc.loop control(%{{.*}}) = (%{{.*}}) to (%{{.*}}) step (%{{.*}}) {
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<nvidia>]}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: acc.terminator
@@ -196,72 +196,72 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
acc.loop gang vector worker control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop worker(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop worker(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop worker(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop vector(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop vector(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({num=%i64Value: i64}) worker vector control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({num=%i64Value: i64, static=%i64Value: i64}) worker(%i64Value: i64) vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({num=%i32Value: i32, static=%idxValue: index}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop tile({%i64Value : i64, %i64Value : i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop tile({%i32Value : i32, %i32Value : i32}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({static=%i64Value: i64, num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.loop gang({dim=%i64Value : i64, static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
%b = acc.cache varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
acc.loop cache(%b : memref<10xf32>) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
return
}
@@ -271,7 +271,7 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
// CHECK: acc.loop
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: attributes {inclusiveUpperbound = array<i1: true>}
+// CHECK-NEXT: attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
// CHECK: acc.loop gang({num=[[I64VALUE]] : i64})
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
@@ -343,7 +343,7 @@ func.func @acc_loop_multiple_block() {
cf.br ^bb1(%22 : index)
^bb3:
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>}
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.yield
}
return
@@ -1477,7 +1477,7 @@ func.func @acc_reduc_test(%a : i64) -> () {
acc.parallel reduction(@reduction_add_i64 -> %a : i64) {
acc.loop reduction(@reduction_add_i64 -> %a : i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes { inclusiveUpperbound = array<i1: true> }
+ } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
acc.yield
}
return
@@ -1869,21 +1869,21 @@ func.func @acc_combined() {
acc.parallel combined(loop) {
acc.loop combined(parallel) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- }
+ } attributes {independent = [#acc.device_type<none>]}
acc.terminator
}
acc.kernels combined(loop) {
acc.loop combined(kernels) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- }
+ } attributes {auto_ = [#acc.device_type<none>]}
acc.terminator
}
acc.serial combined(loop) {
acc.loop combined(serial) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- }
+ } attributes {seq = [#acc.device_type<none>]}
acc.terminator
}
@@ -1949,7 +1949,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- }
+ } attributes {independent = [#acc.device_type<none>]}
return
}
@@ -1971,7 +1971,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>] }
+ } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
return
}
>From d8ab47399c192e347ca16dae176f5c1a31a59e41 Mon Sep 17 00:00:00 2001
From: Razvan Lupusoru <rlupusoru at nvidia.com>
Date: Tue, 10 Jun 2025 20:10:40 -0700
Subject: [PATCH 3/4] Restore attributes test despite being irrelevant
---
flang/test/Lower/OpenACC/acc-loop.f90 | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/flang/test/Lower/OpenACC/acc-loop.f90 b/flang/test/Lower/OpenACC/acc-loop.f90
index eca7fb30da8fa..5baa485534b2a 100644
--- a/flang/test/Lower/OpenACC/acc-loop.f90
+++ b/flang/test/Lower/OpenACC/acc-loop.f90
@@ -151,7 +151,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
! When the induction variable is explicitly private - only a single private entry should be created.
!$acc loop private(i)
@@ -161,7 +161,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop private(c, d)
DO i = 1, n
@@ -170,7 +170,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop private(c) private(d)
DO i = 1, n
@@ -179,7 +179,7 @@ program acc_loop
! CHECK: acc.loop private(@privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_10x10xf32 -> %{{.*}} : !fir.ref<!fir.array<10x10xf32>>, @privatization_ref_i32 -> %{{.*}} : !fir.ref<i32>) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop tile(2)
DO i = 1, n
@@ -189,7 +189,7 @@ program acc_loop
! CHECK: [[TILESIZE:%.*]] = arith.constant 2 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZE]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop tile(*)
DO i = 1, n
@@ -198,7 +198,7 @@ program acc_loop
! CHECK: [[TILESIZEM1:%.*]] = arith.constant -1 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZEM1]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop tile(2, 2)
DO i = 1, n
@@ -211,7 +211,7 @@ program acc_loop
! CHECK: [[TILESIZE2:%.*]] = arith.constant 2 : i32
! CHECK: acc.loop {{.*}} tile({[[TILESIZE1]] : i32, [[TILESIZE2]] : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop tile(tileSize)
DO i = 1, n
@@ -220,7 +220,7 @@ program acc_loop
! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop tile(tileSize, tileSize)
DO i = 1, n
@@ -231,7 +231,7 @@ program acc_loop
! CHECK: acc.loop {{.*}} tile({%{{.*}} : i32, %{{.*}} : i32}) control(%arg0 : i32) = (%{{.*}} : i32) to (%{{.*}} : i32) step (%{{.*}} : i32) {
! CHECK: acc.yield
-! CHECK-NEXT: }{{$}}
+! CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
!$acc loop collapse(2)
DO i = 1, n
>From 4e184b3b08a86ab925935f435fdf1ef5a5b6988a Mon Sep 17 00:00:00 2001
From: Razvan Lupusoru <rlupusoru at nvidia.com>
Date: Tue, 10 Jun 2025 20:14:35 -0700
Subject: [PATCH 4/4] Revert accidental acc loop verifier
---
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 34 ++--------
mlir/test/Dialect/OpenACC/canonicalize.mlir | 4 +-
mlir/test/Dialect/OpenACC/invalid.mlir | 28 ++++-----
mlir/test/Dialect/OpenACC/legalize-data.mlir | 16 ++---
mlir/test/Dialect/OpenACC/ops.mlir | 66 ++++++++++----------
5 files changed, 62 insertions(+), 86 deletions(-)
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index de378a921a7af..c72ec47be9f04 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -2461,34 +2461,10 @@ LogicalResult acc::LoopOp::verify() {
if (hasDuplicateDeviceTypes(getAuto_(), deviceTypes) ||
hasDuplicateDeviceTypes(getIndependent(), deviceTypes) ||
hasDuplicateDeviceTypes(getSeq(), deviceTypes)) {
- return emitError() << "only one of auto, independent, seq can be present "
- "at the same time";
- }
-
- // Check that at least one of auto, independent, or seq is present
- // for the device-independent default clauses.
- auto hasDeviceNone = [](mlir::acc::DeviceTypeAttr attr) -> bool {
- return attr.getValue() == mlir::acc::DeviceType::None;
- };
- bool hasDefaultSeq =
- getSeqAttr()
- ? llvm::any_of(getSeqAttr().getAsRange<mlir::acc::DeviceTypeAttr>(),
- hasDeviceNone)
- : false;
- bool hasDefaultIndependent =
- getIndependentAttr()
- ? llvm::any_of(
- getIndependentAttr().getAsRange<mlir::acc::DeviceTypeAttr>(),
- hasDeviceNone)
- : false;
- bool hasDefaultAuto =
- getAuto_Attr()
- ? llvm::any_of(getAuto_Attr().getAsRange<mlir::acc::DeviceTypeAttr>(),
- hasDeviceNone)
- : false;
- if (!hasDefaultSeq && !hasDefaultIndependent && !hasDefaultAuto) {
- return emitError()
- << "at least one of auto, independent, seq must be present";
+ return emitError() << "only one of \"" << acc::LoopOp::getAutoAttrStrName()
+ << "\", " << getIndependentAttrName() << ", "
+ << getSeqAttrName()
+ << " can be present at the same time";
}
// Gang, worker and vector are incompatible with seq.
@@ -2507,7 +2483,7 @@ LogicalResult acc::LoopOp::verify() {
getGangValue(mlir::acc::GangArgType::Static,
deviceTypeAttr.getValue()))
return emitError()
- << "gang, worker or vector cannot appear with seq";
+ << "gang, worker or vector cannot appear with the seq attr";
}
}
diff --git a/mlir/test/Dialect/OpenACC/canonicalize.mlir b/mlir/test/Dialect/OpenACC/canonicalize.mlir
index fdc8e6b5cae6e..e43a27f6b9e89 100644
--- a/mlir/test/Dialect/OpenACC/canonicalize.mlir
+++ b/mlir/test/Dialect/OpenACC/canonicalize.mlir
@@ -116,10 +116,10 @@ func.func @testhostdataop(%a: memref<f32>, %ifCond: i1) -> () {
acc.host_data dataOperands(%0 : memref<f32>) if(%false) {
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes { inclusiveUpperbound = array<i1: true> }
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes { inclusiveUpperbound = array<i1: true> }
acc.terminator
}
return
diff --git a/mlir/test/Dialect/OpenACC/invalid.mlir b/mlir/test/Dialect/OpenACC/invalid.mlir
index 8f6e961a06163..aadf189273212 100644
--- a/mlir/test/Dialect/OpenACC/invalid.mlir
+++ b/mlir/test/Dialect/OpenACC/invalid.mlir
@@ -2,7 +2,7 @@
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -12,7 +12,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -22,7 +22,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -32,7 +32,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -42,7 +42,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -52,7 +52,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -62,7 +62,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
+// expected-error at +1 {{gang, worker or vector cannot appear with the seq attr}}
acc.loop {
"test.openacc_dummy_op"() : () -> ()
acc.yield
@@ -72,7 +72,7 @@ acc.loop {
// expected-error at +1 {{expected non-empty body.}}
acc.loop {
-} attributes {independent = [#acc.device_type<none>]}
+}
// -----
@@ -99,7 +99,7 @@ acc.loop {
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
-// expected-error at +1 {{only one of auto, independent, seq can be present at the same time}}
+// expected-error at +1 {{only one of "auto", "independent", "seq" can be present at the same time}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
} attributes {auto_ = [#acc.device_type<none>], seq = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
@@ -168,7 +168,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32){
// expected-error at +1 {{'acc.init' op cannot be nested in a compute operation}}
acc.init
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} attributes {inclusiveUpperbound = array<i1: true>}
// -----
@@ -186,7 +186,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
// expected-error at +1 {{'acc.shutdown' op cannot be nested in a compute operation}}
acc.shutdown
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} attributes {inclusiveUpperbound = array<i1: true>}
// -----
@@ -198,7 +198,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.shutdown
}) : () -> ()
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} attributes {inclusiveUpperbound = array<i1: true>}
// -----
@@ -797,7 +797,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>] }
return
}
@@ -816,6 +816,6 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>] }
return
}
diff --git a/mlir/test/Dialect/OpenACC/legalize-data.mlir b/mlir/test/Dialect/OpenACC/legalize-data.mlir
index 40604dcc736de..28ef6761a6ef4 100644
--- a/mlir/test/Dialect/OpenACC/legalize-data.mlir
+++ b/mlir/test/Dialect/OpenACC/legalize-data.mlir
@@ -96,7 +96,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ }
acc.yield
}
return
@@ -109,7 +109,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[CREATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: }
// CHECK: acc.yield
// CHECK: }
@@ -134,7 +134,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ }
acc.yield
}
return
@@ -147,7 +147,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: }
// CHECK: acc.yield
// CHECK: }
@@ -172,7 +172,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop private(@privatization_memref_10_f32 -> %p1 : memref<10xf32>) control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ }
acc.yield
}
return
@@ -185,7 +185,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop private(@privatization_memref_10_f32 -> %[[PRIVATE]] : memref<10xf32>) control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: }
// CHECK: acc.yield
// CHECK: }
@@ -210,7 +210,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ }
acc.yield
}
return
@@ -223,7 +223,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {seq = [#acc.device_type<none>]}
+// CHECK: }
// CHECK: acc.yield
// CHECK: }
diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir
index 97278f869534b..550f295f074a2 100644
--- a/mlir/test/Dialect/OpenACC/ops.mlir
+++ b/mlir/test/Dialect/OpenACC/ops.mlir
@@ -19,7 +19,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
%co = arith.addf %cij, %p : f32
memref.store %co, %C[%arg3, %arg4] : memref<10x10xf32>
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
+ } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>}
acc.yield
}
@@ -40,7 +40,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>}
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
@@ -129,7 +129,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%tmp = arith.addf %axy, %bxy : f32
memref.store %tmp, %c[%y] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
// for i = 0 to 10 step 1
@@ -139,9 +139,9 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%z = arith.addf %ci, %dx : f32
memref.store %z, %d[%x] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
+ } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<nvidia>]}
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.yield
}
acc.terminator
@@ -166,16 +166,16 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
// CHECK-NEXT: acc.loop control(%{{.*}}) = (%{{.*}}) to (%{{.*}}) step (%{{.*}}) {
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<nvidia>]}
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>}
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: acc.terminator
@@ -196,72 +196,72 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
acc.loop gang vector worker control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop worker(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop worker(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop worker(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop vector(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop vector(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({num=%i64Value: i64}) worker vector control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({num=%i64Value: i64, static=%i64Value: i64}) worker(%i64Value: i64) vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({num=%i32Value: i32, static=%idxValue: index}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop tile({%i64Value : i64, %i64Value : i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop tile({%i32Value : i32, %i32Value : i32}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({static=%i64Value: i64, num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.loop gang({dim=%i64Value : i64, static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
%b = acc.cache varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
acc.loop cache(%b : memref<10xf32>) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
return
}
@@ -271,7 +271,7 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
// CHECK: acc.loop
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: attributes {inclusiveUpperbound = array<i1: true>}
// CHECK: acc.loop gang({num=[[I64VALUE]] : i64})
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
@@ -343,7 +343,7 @@ func.func @acc_loop_multiple_block() {
cf.br ^bb1(%22 : index)
^bb3:
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes {inclusiveUpperbound = array<i1: true>}
acc.yield
}
return
@@ -1477,7 +1477,7 @@ func.func @acc_reduc_test(%a : i64) -> () {
acc.parallel reduction(@reduction_add_i64 -> %a : i64) {
acc.loop reduction(@reduction_add_i64 -> %a : i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } attributes { inclusiveUpperbound = array<i1: true> }
acc.yield
}
return
@@ -1869,21 +1869,21 @@ func.func @acc_combined() {
acc.parallel combined(loop) {
acc.loop combined(parallel) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ }
acc.terminator
}
acc.kernels combined(loop) {
acc.loop combined(kernels) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ }
acc.terminator
}
acc.serial combined(loop) {
acc.loop combined(serial) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ }
acc.terminator
}
@@ -1949,7 +1949,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ }
return
}
@@ -1971,7 +1971,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>] }
return
}
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