[Mlir-commits] [mlir] [mlir][AMDGPU] Add scaled floating point conversion ops fp8 (PR #141554)
Krzysztof Drewniak
llvmlistbot at llvm.org
Wed Jun 4 12:31:16 PDT 2025
================
@@ -1230,6 +1257,157 @@ LogicalResult ExtPackedFp8OpLowering::matchAndRewrite(
return success();
}
+LogicalResult ScaledExtPackedOpLowering::matchAndRewrite(
+ ScaledExtPackedOp op, ScaledExtPackedOpAdaptor adaptor,
+ ConversionPatternRewriter &rewriter) const {
+ Location loc = op.getLoc();
+ if (chipset != kGfx950)
+ return rewriter.notifyMatchFailure(
+ loc, "Scaled fp8 conversion instructions are not available on target "
+ "architecture and their emulation is not implemented");
+ Type i32 = getTypeConverter()->convertType(rewriter.getI32Type());
+
+ Value source = adaptor.getSource();
+ Value scale = adaptor.getScale();
+
+ VectorType sourceVecType = dyn_cast<VectorType>(op.getSource().getType());
+ Type sourceElemType = getElementTypeOrSelf(op.getSource());
+ VectorType destVecType = dyn_cast<VectorType>(op.getResult().getType());
+ Type destElemType = getElementTypeOrSelf(op.getResult());
+
+ VectorType packedVecType;
+ if (isa<Float8E5M2Type, Float8E4M3FNType>(sourceElemType)) {
+ VectorType v4i8 = VectorType::get(4, rewriter.getI8Type());
+ packedVecType = cast<VectorType>(getTypeConverter()->convertType(v4i8));
+ } else if (isa<Float4E2M1FNType>(sourceElemType)) {
+ VectorType v8i4 = VectorType::get(8, rewriter.getI4Type());
+ packedVecType = cast<VectorType>(getTypeConverter()->convertType(v8i4));
+ } else {
+ llvm_unreachable("invalid element type for scaled ext");
+ }
+
+ // Extend to a packedVectorType
+ if (!sourceVecType ||
+ sourceVecType.getNumElements() < packedVecType.getNumElements()) {
+ Value longVec = rewriter.create<LLVM::UndefOp>(loc, packedVecType);
----------------
krzysz00 wrote:
Since we've hit issues with this before, I'd go with constant 0s here
https://github.com/llvm/llvm-project/pull/141554
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