[Mlir-commits] [mlir] [mlir][AMDGPU] Add scaled floating point conversion ops fp8 (PR #141554)

[Tim Gymnich]

tgymnich wrote:

@krzysz00 I went ahead and made the operations also support fp4. I did not include fp6, since the packing behaves completely different (e.g. no selectable indices). 
We should think about naming again maybe add the packing width to the name?
I'll need to follow up with another operator for the non-packed `cvt.scalef32.` variants.

https://github.com/llvm/llvm-project/pull/141554