[Mlir-commits] [mlir] [MLIR][NVVM] Add prefetch Ops (PR #141737)
Guray Ozen
llvmlistbot at llvm.org
Mon Jun 2 11:13:38 PDT 2025
================
@@ -2333,6 +2353,79 @@ def NVVM_CpAsyncBulkTensorSharedCTAToGlobalOp :
let hasVerifier = 1;
}
+//===----------------------------------------------------------------------===//
+// NVVM Prefetch Ops
+//===----------------------------------------------------------------------===//
+
+def NVVM_PrefetchL1Op : NVVM_Op<"prefetch.L1"> {
+ let summary = "Brings the cache line containing the specified address into L1 cache";
+ let description = [{
+ Brings the cache line containing the specified address into L1 cache.
+
+ Operand `addr` can be a global, local or generic address pointer.
+ No operation is performed if `addr` maps to a `shared` memory location.
+
+ [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-prefetch-prefetchu)
+ }];
+ let arguments = (ins AnyTypeOf<[LLVM_PointerGlobal,
+ LLVM_PointerLocal,
+ LLVM_PointerGeneric]>:$addr);
+ let assemblyFormat = "$addr attr-dict `:` type($addr)";
+
+ let extraClassDeclaration = [{
+ static llvm::Intrinsic::ID getIntrinsicID(Operation &op);
+ }];
+ let llvmBuilder = [{
+ auto intId = NVVM::PrefetchL1Op::getIntrinsicID(*op);
+ createIntrinsicCall(builder, intId, $addr);
+ }];
+}
+
+def NVVM_PrefetchL2Op : NVVM_Op<"prefetch.L2"> {
----------------
grypp wrote:
I think it's worth trying to have single op. Because op operands/semantics are the same.
But it's up to you.
https://github.com/llvm/llvm-project/pull/141737
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