[Mlir-commits] [mlir] 77e2e3f - [mlir][memref] Update tests to use memref.assume_alignment properly. (#142358)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Mon Jun 2 07:57:39 PDT 2025
Author: Han-Chung Wang
Date: 2025-06-02T07:57:36-07:00
New Revision: 77e2e3f64158939316ca576c4178663bc9dfee1b
URL: https://github.com/llvm/llvm-project/commit/77e2e3f64158939316ca576c4178663bc9dfee1b
DIFF: https://github.com/llvm/llvm-project/commit/77e2e3f64158939316ca576c4178663bc9dfee1b.diff
LOG: [mlir][memref] Update tests to use memref.assume_alignment properly. (#142358)
With
https://github.com/llvm/llvm-project/commit/ffb9bbfd0745dc22e1fd6edd7b62f72b91f4f6de,
memref.assume_alignment op returns a result value. The revision updates
the tests to reflect the change:
- Update all the lit tests to use the result of memref.assume_alignment,
if it is present.
- Capture the result of the op in lit tests.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Added:
Modified:
mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
mlir/test/Dialect/MemRef/ops.mlir
mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
Removed:
################################################################################
diff --git a/mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir b/mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
index 8c863bb2d3d65..acfc188574255 100644
--- a/mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
+++ b/mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
@@ -189,7 +189,7 @@ func.func @assume_alignment(%0 : memref<4x4xf16>) {
// CHECK-NEXT: %[[ALIGN:.*]] = llvm.mlir.constant(16 : index) : i64
// CHECK-NEXT: llvm.intr.assume %[[TRUE]] ["align"(%[[PTR]], %[[ALIGN]] : !llvm.ptr, i64)] : i1
// CHECK-INTERFACE: llvm.intr.assume
- memref.assume_alignment %0, 16 : memref<4x4xf16>
+ %1 = memref.assume_alignment %0, 16 : memref<4x4xf16>
return
}
@@ -205,7 +205,7 @@ func.func @assume_alignment_w_offset(%0 : memref<4x4xf16, strided<[?, ?], offset
// CHECK-DAG: %[[ALIGN:.*]] = llvm.mlir.constant(16 : index) : i64
// CHECK-NEXT: llvm.intr.assume %[[TRUE]] ["align"(%[[BUFF_ADDR]], %[[ALIGN]] : !llvm.ptr, i64)] : i1
// CHECK-INTERFACE: llvm.intr.assume
- memref.assume_alignment %0, 16 : memref<4x4xf16, strided<[?, ?], offset: ?>>
+ %1 = memref.assume_alignment %0, 16 : memref<4x4xf16, strided<[?, ?], offset: ?>>
return
}
// -----
diff --git a/mlir/test/Dialect/MemRef/emulate-narrow-type.mlir b/mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
index 111a02abcc74c..3378d329e8205 100644
--- a/mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
+++ b/mlir/test/Dialect/MemRef/emulate-narrow-type.mlir
@@ -63,7 +63,7 @@ func.func @memref_load_i4(%arg0: index) -> i4 {
func.func @memref_load_i4_rank2(%arg0: index, %arg1: index) -> i4 {
%0 = memref.alloc() : memref<3x125xi4>
- %align0 =memref.assume_alignment %0, 64 : memref<3x125xi4>
+ %align0 = memref.assume_alignment %0, 64 : memref<3x125xi4>
%1 = memref.load %align0[%arg0,%arg1] : memref<3x125xi4>
return %1 : i4
}
diff --git a/mlir/test/Dialect/MemRef/ops.mlir b/mlir/test/Dialect/MemRef/ops.mlir
index 38ee363a7d424..13fdf3cf13510 100644
--- a/mlir/test/Dialect/MemRef/ops.mlir
+++ b/mlir/test/Dialect/MemRef/ops.mlir
@@ -283,7 +283,7 @@ func.func @memref_view(%arg0 : index, %arg1 : index, %arg2 : index) {
// CHECK-LABEL: func @assume_alignment
// CHECK-SAME: %[[MEMREF:.*]]: memref<4x4xf16>
func.func @assume_alignment(%0: memref<4x4xf16>) {
- // CHECK: memref.assume_alignment %[[MEMREF]], 16 : memref<4x4xf16>
+ // CHECK: %{{.*}} = memref.assume_alignment %[[MEMREF]], 16 : memref<4x4xf16>
%1 = memref.assume_alignment %0, 16 : memref<4x4xf16>
return
}
diff --git a/mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir b/mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
index aaa3aff5350ad..a5653f395a2c4 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
@@ -120,7 +120,7 @@ func.func @main() {
threads(%arg3, %arg4, %arg5) in (%arg9 = %hc128, %arg10 = %hc1, %arg11 = %hc1)
dynamic_shared_memory_size %shmemSize
{
- memref.assume_alignment %matrixD, 16 : memref<128x128xf32>
+ %align_matrixD = memref.assume_alignment %matrixD, 16 : memref<128x128xf32>
%c256 = arith.constant 256 : index
%c10000000 = arith.constant 10000000 : index
@@ -226,7 +226,7 @@ func.func @main() {
scf.for %arg12 = %17 to %c128 step %c4 {
%19 = arith.muli %18, %c4 : index
%20 = vector.load %accShmemPtr[%arg12, %19] : memref<128x128xf32, 3>, vector<4xf32>
- vector.store %20, %matrixD[%arg12, %19] : memref<128x128xf32>, vector<4xf32>
+ vector.store %20, %align_matrixD[%arg12, %19] : memref<128x128xf32>, vector<4xf32>
}
gpu.terminator
}
diff --git a/mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir b/mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
index b257d2b0f1e34..197351f1921e7 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
@@ -120,7 +120,7 @@ func.func @main() {
threads(%arg3, %arg4, %arg5) in (%arg9 = %hc128, %arg10 = %hc1, %arg11 = %hc1)
dynamic_shared_memory_size %shmemSize
{
- memref.assume_alignment %matrixD, 16 : memref<128x128xf32>
+ %align_matrixD = memref.assume_alignment %matrixD, 16 : memref<128x128xf32>
%c256 = arith.constant 256 : index
%c10000000 = arith.constant 10000000 : index
@@ -234,7 +234,7 @@ func.func @main() {
scf.for %arg12 = %17 to %c128 step %c4 {
%19 = arith.muli %18, %c4 : index
%20 = vector.load %accShmemPtr[%arg12, %19] : memref<128x128xf32, 3>, vector<4xf32>
- vector.store %20, %matrixD[%arg12, %19] : memref<128x128xf32>, vector<4xf32>
+ vector.store %20, %align_matrixD[%arg12, %19] : memref<128x128xf32>, vector<4xf32>
}
gpu.terminator
}
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