[Mlir-commits] [mlir] [mlir][Linalg] Fix fusing of indexed linalg consumer with different axes (PR #140892)

[llvmlistbot at llvm.org]

https://github.com/MaheshRavishankar requested changes to this pull request.

Thanks for the change. I think the one-liner change maybe ok, but I am concerned about the test added here. 

```
%5 = linalg.generic {
        indexing_maps = [affine_map<(d0) -> (d0, 1)>, affine_map<(d0) -> (d0)>],
        iterator_types = ["parallel"]}
        ins(%1 : tensor<2x2xi32>) outs(%4 : tensor<2xi32>) {
          ^bb0(%in: i32, %out: i32):
            linalg.yield %in : i32
        } -> tensor<2xi32>
  return %5 : tensor<2xi32>
```

is effectively just a 

```
%5 = tensor.extract_slice %1[0, 1][.., 1] [1, 1] : tensor<2x2xi32> to tensor<2xi32>
```

Linalg operations are not meant to represent slice semantics this way. It is not caught by the verifier cause that would require a heavy hammer of disallowing indexing maps with constants in the range, and that is not a practical thing to do right now based on how Linalg is used in general. 

If you have a different example that motivates the change that might help.

https://github.com/llvm/llvm-project/pull/140892