[Mlir-commits] [mlir] [MLIR][XeGPU] Allow load/store/prefetch uses [memref+offset] instead of tdesc (PR #150576)
Jianhui Li
llvmlistbot at llvm.org
Wed Jul 30 10:54:21 PDT 2025
================
@@ -644,9 +672,14 @@ LogicalResult CreateDescOp::verify() {
//===----------------------------------------------------------------------===//
LogicalResult PrefetchOp::verify() {
auto tdescTy = getTensorDescType();
- if (!tdescTy.isScattered())
+
+ if (tdescTy && !tdescTy.isScattered())
return emitOpError("Expects a scattered TensorDesc.\n");
+ if (!tdescTy && getRankOf(getSource()) > 1)
+ return emitOpError(
+ "Expecting the source is a 1D memref or pointer (uint64_t).");
----------------
Jianhui-Li wrote:
> nit: let's add invalid test cases for these 3 ops
added
https://github.com/llvm/llvm-project/pull/150576
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