[Mlir-commits] [mlir] [MLIR][XeGPU] Add offsets to load/store/prefetch (PR #150576)
Jianhui Li
llvmlistbot at llvm.org
Mon Jul 28 08:41:16 PDT 2025
================
@@ -189,6 +189,7 @@ def XeGPU_TensorDesc: XeGPUTypeDef<"TensorDesc", "tensor_desc",
let genVerifyDecl = 1;
}
+def XeGPU_TensorDescOrMemRef : AnyTypeOf<[XeGPU_TensorDesc,Non0RankedMemRefOf<[XeGPU_ScalarType]>, UI64]>;
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Jianhui-Li wrote:
This change is the purpose of this PR. It allows the xegpu.load to accept memref+offset, which is the target OP semantics that we are migrating to. The current xegpu.load accepts tdesc operand, which encapsulates "memref+offset". This PR "fold" "memref+offset" directly to xegpu.load replacing "tdesc". The semantics are combination of "creating scattered_tdesc + xegpu.load with scattered_tdesc".
The block_tdesc for load_nd was kept since it contains meaningful info (tile shape/stride) after offset being taken out.
https://github.com/llvm/llvm-project/pull/150576
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