[Mlir-commits] [mlir] [AMDGPU] [MLIR] Add 96 and 128 bit GatherToLDS for gfx950 (PR #147496)

[Daniel Hernandez-Juarez]

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@@ -1198,14 +1198,19 @@ struct GatherToLDSOpLowering : public ConvertOpToLLVMPattern<GatherToLDSOp> {
     Type transferType = op.getTransferType();
     size_t loadWidth = [&]() -> size_t {
       if (auto transferVectorType = dyn_cast<VectorType>(transferType)) {
-        return transferVectorType.getNumElements() *
-               (transferVectorType.getElementTypeBitWidth() / 8);
+        return (transferVectorType.getNumElements() *
+                transferVectorType.getElementTypeBitWidth()) /
+               8;
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dhernandez0 wrote:

this change is needed if we want vector<16xf6> to work correctly. The original code, would do f6.getElementTypeBitWidth()/8 = 0.

https://github.com/llvm/llvm-project/pull/147496