[Mlir-commits] [mlir] [mlir][transforms] Process RegionBranchOp with empty region (PR #123895)
Jeff Niu
llvmlistbot at llvm.org
Thu Jan 30 11:55:33 PST 2025
https://github.com/Mogball requested changes to this pull request.
Thanks for the PR! This seems like a pretty major bug, and I'm surprised that this is the only region affected by this bug, given how prevalent `scf.if` with an empty else region must be.
That being said, I am not convinced this is the right fix. First, if this indeed an issue, there will be other passes that suffer from the same bug. We should clarify the contract of RegionBranchOpInterface has with its operations. Should ops be allowed to have empty regions? For example, `IfOp::getRegionSuccessors` will ignore the else region if it's empty.
I personally think `scf.if` should ban empty else region and simply require it to be `else { scf.yield }` and we can sugar this in the syntax.
https://github.com/llvm/llvm-project/pull/123895
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