[Mlir-commits] [mlir] [MLIR][NVVM] Update Float to TF32 conversion Op (PR #125048)

[Durgadoss R]

================
@@ -1225,17 +1222,29 @@ llvm::Intrinsic::ID CvtFloatToTF32Op::getIntrinsicID(NVVM::FPRoundingMode rnd,
                                                      NVVM::SaturationMode sat,
                                                      bool hasRelu) {
   using RndMode = NVVM::FPRoundingMode;
+  bool hasSatFinite = (sat == NVVM::SaturationMode::SATFINITE);
+  bool hasReluAndSatFinite = hasRelu && hasSatFinite;
   switch (rnd) {
   case RndMode::RN:
-    return hasRelu ? llvm::Intrinsic::nvvm_f2tf32_rn_relu
-                   : llvm::Intrinsic::nvvm_f2tf32_rn;
+    if(hasReluAndSatFinite)
+      return llvm::Intrinsic::nvvm_f2tf32_rn_relu_satfinite;
+    if(hasRelu)
+      return llvm::Intrinsic::nvvm_f2tf32_rn_relu;
+    if(hasSatFinite)
+      return llvm::Intrinsic::nvvm_f2tf32_rn_satfinite;
+    return llvm::Intrinsic::nvvm_f2tf32_rn;
   case RndMode::RZ:
-    return hasRelu ? llvm::Intrinsic::nvvm_f2tf32_rz_relu
-                   : llvm::Intrinsic::nvvm_f2tf32_rz;
+    if(hasReluAndSatFinite)
+      return llvm::Intrinsic::nvvm_f2tf32_rz_relu_satfinite;
+    if(hasRelu)
+      return llvm::Intrinsic::nvvm_f2tf32_rz_relu;
+    if(hasSatFinite)
+      return llvm::Intrinsic::nvvm_f2tf32_rz_satfinite;
+    return llvm::Intrinsic::nvvm_f2tf32_rz;
   case RndMode::RNA:
-    return (sat == NVVM::SaturationMode::SATFINITE)
-               ? llvm::Intrinsic::nvvm_f2tf32_rna_satfinite
-               : llvm::Intrinsic::nvvm_f2tf32_rna;
+    return hasSatFinite
+            ? llvm::Intrinsic::nvvm_f2tf32_rna_satfinite
+            : llvm::Intrinsic::nvvm_f2tf32_rna;
----------------
durga4github wrote:

Change as such LGTM,

Optionally, we can try some macros (like the cp_async_id we added recently) to see if this can be simplified.

https://github.com/llvm/llvm-project/pull/125048