[Mlir-commits] [mlir] c9f72b2 - [MLIR][LLVM] Fix #llvm.constant_range parsing (#123009)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Fri Jan 17 08:01:42 PST 2025
Author: Keyi Zhang
Date: 2025-01-17T17:01:39+01:00
New Revision: c9f72b2873d2b3ea777c3ee512696f2259252bce
URL: https://github.com/llvm/llvm-project/commit/c9f72b2873d2b3ea777c3ee512696f2259252bce
DIFF: https://github.com/llvm/llvm-project/commit/c9f72b2873d2b3ea777c3ee512696f2259252bce.diff
LOG: [MLIR][LLVM] Fix #llvm.constant_range parsing (#123009)
When `APInt` parses negative numbers, it may extend the bit width. This
patch ensures the bit width matches with the attribute.
Fixes https://github.com/llvm/llvm-project/issues/122996.
Added:
Modified:
mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
mlir/test/Dialect/LLVMIR/func.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp b/mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
index ff1636bc121b64..e4f9d6f9874015 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
@@ -270,11 +270,9 @@ Attribute ConstantRangeAttr::parse(AsmParser &parser, Type odsType) {
if (parser.parseInteger(lower) || parser.parseComma() ||
parser.parseInteger(upper) || parser.parseGreater())
return Attribute{};
- // For some reason, 0 is always parsed as 64-bits, fix that if needed.
- if (lower.isZero())
- lower = lower.sextOrTrunc(bitWidth);
- if (upper.isZero())
- upper = upper.sextOrTrunc(bitWidth);
+ // Non-positive numbers may use more bits than `bitWidth`
+ lower = lower.sextOrTrunc(bitWidth);
+ upper = upper.sextOrTrunc(bitWidth);
return parser.getChecked<ConstantRangeAttr>(loc, parser.getContext(), lower,
upper);
}
diff --git a/mlir/test/Dialect/LLVMIR/func.mlir b/mlir/test/Dialect/LLVMIR/func.mlir
index e2a444c1faaba1..74dd862ce8fb26 100644
--- a/mlir/test/Dialect/LLVMIR/func.mlir
+++ b/mlir/test/Dialect/LLVMIR/func.mlir
@@ -479,3 +479,9 @@ llvm.func @intel_reqd_sub_group_size_hint() attributes {llvm.intel_reqd_sub_grou
// CHECK-SAME: llvm.workgroup_attribution = #llvm.mlir.workgroup_attribution<512 : i64, i32>
// CHECK-SAME: llvm.workgroup_attribution = #llvm.mlir.workgroup_attribution<128 : i64, !llvm.struct<(i32, i64, f32)>
llvm.func @workgroup_attribution(%arg0: !llvm.ptr {llvm.workgroup_attribution = #llvm.mlir.workgroup_attribution<512 : i64, i32>}, %arg1: !llvm.ptr {llvm.workgroup_attribution = #llvm.mlir.workgroup_attribution<128 : i64, !llvm.struct<(i32, i64, f32)>>})
+
+// -----
+
+// CHECK: @constant_range_negative
+// CHECK-SAME: llvm.range = #llvm.constant_range<i32, 0, -2147483648>
+llvm.func @constant_range_negative() -> (i32 {llvm.range = #llvm.constant_range<i32, 0, -2147483648>})
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