[Mlir-commits] [mlir] [MLIR] Add [[maybe_unused]] to variables on used in assert (PR #123037)
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llvmlistbot at llvm.org
Wed Jan 15 02:15:10 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-vector
@llvm/pr-subscribers-mlir
Author: Will Froom (WillFroom)
<details>
<summary>Changes</summary>
Add [[maybe_unused]] to suppresses warnings when `-NDEBUG` is enabled
---
Full diff: https://github.com/llvm/llvm-project/pull/123037.diff
1 Files Affected:
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp (+2-2)
``````````diff
diff --git a/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp b/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
index a674a590091815..95064083b21d44 100644
--- a/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
@@ -1291,7 +1291,7 @@ using ExtractNBitsFn =
/// bitwise ops to avoid leaving LLVM to scramble with peephole optimizations.
static Value rewriteI4ToI8Ext(PatternRewriter &rewriter, Location loc,
Value srcValue, const ExtractNBitsFn &extFn) {
- auto srcVecType = cast<VectorType>(srcValue.getType());
+ [[maybe_unused]] auto srcVecType = cast<VectorType>(srcValue.getType());
assert(srcVecType.getElementType().isSignlessInteger(4) &&
"Expected i4 type");
@@ -1311,7 +1311,7 @@ static Value rewriteI4ToI8Ext(PatternRewriter &rewriter, Location loc,
/// bitwise ops to avoid leaving LLVM to scramble with peephole optimizations.
static Value rewriteI2ToI8Ext(PatternRewriter &rewriter, Location loc,
Value srcValue, const ExtractNBitsFn &extFn) {
- VectorType srcVecType = cast<VectorType>(srcValue.getType());
+ [[maybe_unused]] VectorType srcVecType = cast<VectorType>(srcValue.getType());
assert(srcVecType.getElementType().isSignlessInteger(2) &&
"Expected i2 type");
``````````
</details>
https://github.com/llvm/llvm-project/pull/123037
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