[Mlir-commits] [mlir] [MLIR] Implement emulation of static indexing subbyte type vector stores (PR #115922)

[Andrzej Warzyński]

================
@@ -356,3 +356,142 @@ func.func @vector_maskedload_i2_constant_mask_unaligned(%passthru: vector<5xi2>)
 // CHECK: %[[RESULT:.+]] = vector.extract_strided_slice %[[SELECT]]
 // CHECK-SAME: {offsets = [1], sizes = [5], strides = [1]} : vector<8xi2> to vector<5xi2>
 // CHECK: return %[[RESULT]] : vector<5xi2>
+
+///----------------------------------------------------------------------------------------
+/// vector.store
+///----------------------------------------------------------------------------------------
+
+func.func @vector_store_i2_const_index_two_atomic_rmw(%arg0: vector<3xi2>) {
----------------
banach-space wrote:

>From what I can tell, the main "high level" feature of this example is that there will be two partial stores. And these partial stores will be modelled using 2 atomic RMWs. Similar logic applies to other examples. So, I'd be tempted to replace `two_atomic_rmw` (low level info) with `two_partial_stores` (high level info).
```suggestion
func.func @vector_store_i2_const_index_two_partial_stores(%arg0: vector<3xi2>) {
```

https://github.com/llvm/llvm-project/pull/115922