[Mlir-commits] [mlir] [MLIR] Implement emulation of static indexing subbyte type vector stores (PR #115922)

[llvmlistbot at llvm.org]

lialan wrote:

> From the changes to `ConvertVectorStore`, I’m inferring an assumption that doesn’t appear to be explicitly documented. Specifically, it seems that the `vector.store` being emulated will never span more than 3 bytes in memory. Based on the tests, this appears to result in:
> 
> * either 1 x 1-byte store,
> * 2 x 1-byte stores, or
> * 3 x 1-byte stores.

That is actually not true. The code can handle vector-related:
* arbitrary sized emulated stores
* arbitrary indexed stores

those 1x1, 2x1 or 3x1 stores are just the simplest test cases that can showcase various cases we might hit in real world. In the test case, there are some corner cases. For example:
* store a <1xi2> into the middle of <4xi2>. In this case, we just need 1 atomic store.
* store a <5xi2> into somewhere within a <8xi2>, in such case, we might need to do atomic store on one or both of the bytes.
* ......

> 
> However, what would happen in a case like this, which seems to require more than 3 x 1-byte stores?
> 
> ```mlir
> vector.store %arg0, %src[%c0, %c0] : memref<4x4xi2>, vector<13xi2>
> ```

That is definitely handled in the code. :-)



https://github.com/llvm/llvm-project/pull/115922