[Mlir-commits] [mlir] 0d7022e - [MLIR][GPU] Fix gpu.printf test syntax after f50f9698ad012882df8dd605f5482e280c138266

[Benjamin Kramer]

Author: Benjamin Kramer
Date: 2025-01-08T15:17:39+01:00
New Revision: 0d7022ed75ef4d1efdfbdbf206e3f4041a9cd18b

URL: https://github.com/llvm/llvm-project/commit/0d7022ed75ef4d1efdfbdbf206e3f4041a9cd18b
DIFF: https://github.com/llvm/llvm-project/commit/0d7022ed75ef4d1efdfbdbf206e3f4041a9cd18b.diff

LOG: [MLIR][GPU] Fix gpu.printf test syntax after f50f9698ad012882df8dd605f5482e280c138266

Added: 
    

Modified: 
    mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
index fce16f3df23686..e76fa03903b8a6 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
@@ -129,9 +129,9 @@ module @mymod {
           scf.for %j = %c0 to %c128 step %c1 {
             %lhs0 = memref.load %rhsShmem[%ii, %j] : !shmemrhs
             %lhs032 = arith.extf %lhs0: f16 to f32
-            gpu.printf "%.0f,   " %lhs032 : f32
+            gpu.printf "%.0f,   ", %lhs032 : f32
           }
-          gpu.printf "%d\n" %c-1_i32 : i32
+          gpu.printf "%d\n", %c-1_i32 : i32
         }
         gpu.printf "===----------------=== %d \n", %c-1_i32 : i32
       }