[Mlir-commits] [mlir] [mlir] [Vector] Add IndexBitWidth option to vector-to-llvm pass (PR #128154)

[Rishabh Bali]

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@@ -0,0 +1,674 @@
+// RUN: mlir-opt %s -convert-vector-to-llvm='index-bitwidth=32' -split-input-file | FileCheck %s
+
+// CHECK-LABEL:   func.func @masked_reduce_add_f32_scalable(
+// CHECK-SAME:                                              %[[VAL_0:.*]]: vector<[16]xf32>,
+// CHECK-SAME:                                              %[[VAL_1:.*]]: vector<[16]xi1>) -> f32 {
+// CHECK:           %[[VAL_2:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
+// CHECK:           %[[VAL_3:.*]] = llvm.mlir.constant(16 : i32) : i32
+// CHECK:           %[[VAL_4:.*]] = "llvm.intr.vscale"() : () -> i32
+// CHECK:           %[[VAL_5:.*]] = builtin.unrealized_conversion_cast %[[VAL_4]] : i32 to index
+// CHECK:           %[[VAL_6:.*]] = arith.index_cast %[[VAL_5]] : index to i32
+// CHECK:           %[[VAL_7:.*]] = arith.muli %[[VAL_3]], %[[VAL_6]] : i32
+// CHECK:           %[[VAL_8:.*]] = "llvm.intr.vp.reduce.fadd"(%[[VAL_2]], %[[VAL_0]], %[[VAL_1]], %[[VAL_7]]) : (f32, vector<[16]xf32>, vector<[16]xi1>, i32) -> f32
+// CHECK:           return %[[VAL_8]] : f32
+// CHECK:         }
+func.func @masked_reduce_add_f32_scalable(%arg0: vector<[16]xf32>, %mask : vector<[16]xi1>) -> f32 {
+  %0 = vector.mask %mask { vector.reduction <add>, %arg0 : vector<[16]xf32> into f32 } : vector<[16]xi1> -> f32
+  return %0 : f32
+}
+
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quic-rb10 wrote:

I agree!! I have removed the redundant test cases from the file.

https://github.com/llvm/llvm-project/pull/128154