[Mlir-commits] [mlir] [MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression op in the emitted if condition of a cf.cond_br (PR #128958)

[llvmlistbot at llvm.org]

https://github.com/gdehame created https://github.com/llvm/llvm-project/pull/128958

[MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression op in the emitted if condition of a cf.cond_br
    
    Running `mlir-translate -mlir-to-cpp -declare-variables-at-top input.mlir` with `input.mlir` as
    ```
    module {
      emitc.func @f(%0 : i32, %1 : i32) {
        %2 = expression : i1 {
          %3 = cmp lt, %0, %1 : (i32, i32) -> i1
          yield %3 : i1
        }
        cf.cond_br %2, ^bb1, ^bb1
      ^bb1:  // 2 preds: ^bb0, ^bb0
        return
      }
    }
    ```
    doesn't inline the expression %2 and generates a use of an undeclared variable in the generated if:
    ```
    void f(int32_t v1, int32_t v2) {
      if (v3) {
        goto label2;
      } else {
        goto label2;
      }
    label2:
      return;
    }
    ```

>From 0ebf44c58b91d2279cd4abbc561ca8dc4908051a Mon Sep 17 00:00:00 2001
From: gdehame <gabrieldehame at gmail.com>
Date: Thu, 27 Feb 2025 00:17:20 +0100
Subject: [PATCH] [MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression
 op in the emitted if condition of a cf.cond_br

Running `mlir-translate -mlir-to-cpp -declare-variables-at-top input.mlir` with `input.mlir` as
```
module {
  emitc.func @f(%0 : i32, %1 : i32) {
    %2 = expression : i1 {
      %3 = cmp lt, %0, %1 : (i32, i32) -> i1
      yield %3 : i1
    }
    cf.cond_br %2, ^bb1, ^bb1
  ^bb1:  // 2 preds: ^bb0, ^bb0
    return
  }
}
```
doesn't inline the expression %2 and generates a use of an undeclared variable in the generated if:
```
void f(int32_t v1, int32_t v2) {
  if (v3) {
    goto label2;
  } else {
    goto label2;
  }
label2:
  return;
}
```
---
 mlir/lib/Target/Cpp/TranslateToCpp.cpp |  6 ++++--
 mlir/test/Target/Cpp/control_flow.mlir | 19 +++++++++++++++++++
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/mlir/lib/Target/Cpp/TranslateToCpp.cpp b/mlir/lib/Target/Cpp/TranslateToCpp.cpp
index abff252575eb0..b00820ffc542b 100644
--- a/mlir/lib/Target/Cpp/TranslateToCpp.cpp
+++ b/mlir/lib/Target/Cpp/TranslateToCpp.cpp
@@ -613,8 +613,10 @@ static LogicalResult printOperation(CppEmitter &emitter,
   Block &trueSuccessor = *condBranchOp.getTrueDest();
   Block &falseSuccessor = *condBranchOp.getFalseDest();
 
-  os << "if (" << emitter.getOrCreateName(condBranchOp.getCondition())
-     << ") {\n";
+  os << "if (";
+  if (failed(emitter.emitOperand(condBranchOp.getCondition())))
+    return failure();
+  os << ") {\n";
 
   os.indent();
 
diff --git a/mlir/test/Target/Cpp/control_flow.mlir b/mlir/test/Target/Cpp/control_flow.mlir
index 436543f7ace95..101b30c2521c9 100644
--- a/mlir/test/Target/Cpp/control_flow.mlir
+++ b/mlir/test/Target/Cpp/control_flow.mlir
@@ -68,3 +68,22 @@ func.func @block_labels1() {
   // CPP-DECLTOP-NEXT: label2:
   // CPP-DECLTOP-NEXT: return;
   // CPP-DECLTOP-NEXT: }
+
+emitc.func @expression_inlining(%0 : i32, %1 : i32) {
+  %2 = expression : i1 {
+    %3 = cmp lt, %0, %1 : (i32, i32) -> i1
+    yield %3 : i1
+  }
+  cf.cond_br %2, ^bb1, ^bb1
+  ^bb1:  // 2 preds: ^bb0, ^bb0
+    return
+}
+// CPP-DECLTOP: void expression_inlining(int32_t [[v1:v.*]], int32_t [[v2:v.*]]) {
+// CPP-DECLTOP-NEXT:   if ([[v1]] < [[v2]]) {
+// CPP-DECLTOP-NEXT:     goto label2;
+// CPP-DECLTOP-NEXT:   } else {
+// CPP-DECLTOP-NEXT:     goto label2;
+// CPP-DECLTOP-NEXT:   }
+// CPP-DECLTOP-NEXT: label2:
+// CPP-DECLTOP-NEXT:   return;
+// CPP-DECLTOP-NEXT: }