[Mlir-commits] [mlir] [mlir][xegpu] Improve XeGPU op verification logic for SIMT flavor and update tests. (PR #127920)

[Adam Siemieniuk]

================
@@ -441,14 +481,19 @@ def XeGPU_CreateDescOp: XeGPU_Op<"create_tdesc", [Pure, ViewLikeOpInterface]> {
     match the dimension of offsets. It may also has a second dimension corresponding to
     the chunk_size if the chunk size is larger than 1.
 
-    Example 1. It assumes subgroup size is 4, and accesses a[0], a[16], a[32], a[64]
+    In SIMT mode, similar to `create_nd_tdesc` the resulting tensor descriptor is augmented
+    with `SGMapAttr` which describes the mapping of the tensor descriptor to the work items.
+    In this case, first dimension of the tensor descriptor represents the work-items, and
----------------
adam-smnk wrote:

nit: the first

https://github.com/llvm/llvm-project/pull/127920