[Mlir-commits] [mlir] Full slices when tiling full loop trip count (PR #127197)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Mon Feb 17 06:18:55 PST 2025


josel-amd wrote:

> Can you include an example of why things would fail in the PR description? It's hard to understand what you mean. I can look at the test case next week, but a description should explain the problem with an example of what could go wrong regardless.

No problem! I added a more elaborated example that should portrait the problem this patch is trying to fix.

https://github.com/llvm/llvm-project/pull/127197


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