[Mlir-commits] [mlir] [MLIR][LLVMIR] Add support for asin acos atan intrinsics op (PR #127317)
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llvmlistbot at llvm.org
Sat Feb 15 04:43:02 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-llvm
Author: FantasqueX (FantasqueX)
<details>
<summary>Changes</summary>
This is similar to https://github.com/llvm/llvm-project/pull/125748
---
Full diff: https://github.com/llvm/llvm-project/pull/127317.diff
3 Files Affected:
- (modified) mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td (+4)
- (modified) mlir/test/Target/LLVMIR/Import/intrinsic.ll (+19)
- (modified) mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir (+20)
``````````diff
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index 72fae1bdbf461..c270b0898f865 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -170,6 +170,10 @@ def LLVM_SinOp : LLVM_UnaryIntrOpF<"sin">;
def LLVM_CosOp : LLVM_UnaryIntrOpF<"cos">;
def LLVM_TanOp : LLVM_UnaryIntrOpF<"tan">;
+def LLVM_ASinOp : LLVM_UnaryIntrOpF<"asin">;
+def LLVM_ACosOp : LLVM_UnaryIntrOpF<"acos">;
+def LLVM_ATanOp : LLVM_UnaryIntrOpF<"atan">;
+
def LLVM_SinhOp : LLVM_UnaryIntrOpF<"sinh">;
def LLVM_CoshOp : LLVM_UnaryIntrOpF<"cosh">;
def LLVM_TanhOp : LLVM_UnaryIntrOpF<"tanh">;
diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
index 249a0552c87f3..569b0def37856 100644
--- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -120,6 +120,25 @@ define void @trig_test(float %0, <8 x float> %1) {
ret void
}
+; CHECK-LABEL: llvm.func @inv_trig_test
+define void @inv_trig_test(float %0, <8 x float> %1) {
+ ; CHECK: llvm.intr.asin(%{{.*}}) : (f32) -> f32
+ %3 = call float @llvm.asin.f32(float %0)
+ ; CHECK: llvm.intr.asin(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+ %4 = call <8 x float> @llvm.asin.v8f32(<8 x float> %1)
+
+ ; CHECK: llvm.intr.acos(%{{.*}}) : (f32) -> f32
+ %5 = call float @llvm.acos.f32(float %0)
+ ; CHECK: llvm.intr.acos(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+ %6 = call <8 x float> @llvm.acos.v8f32(<8 x float> %1)
+
+ ; CHECK: llvm.intr.atan(%{{.*}}) : (f32) -> f32
+ %7 = call float @llvm.atan.f32(float %0)
+ ; CHECK: llvm.intr.atan(%{{.*}}) : (vector<8xf32>) -> vector<8xf32>
+ %8 = call <8 x float> @llvm.atan.v8f32(<8 x float> %1)
+
+ ret void
+}
; CHECK-LABEL: llvm.func @hyperbolic_trig_test
define void @hyperbolic_trig_test(float %0, <8 x float> %1) {
; CHECK: llvm.intr.sinh(%{{.*}}) : (f32) -> f32
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index 2c208789e36dd..3616a2e3c7b21 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -122,6 +122,26 @@ llvm.func @trig_test(%arg0: f32, %arg1: vector<8xf32>) {
llvm.return
}
+// CHECK-LABEL: @inv_trig_test
+llvm.func @inv_trig_test(%arg0: f32, %arg1: vector<8xf32>) {
+ // CHECK: call float @llvm.asin.f32
+ llvm.intr.asin(%arg0) : (f32) -> f32
+ // CHECK: call <8 x float> @llvm.asin.v8f32
+ llvm.intr.asin(%arg1) : (vector<8xf32>) -> vector<8xf32>
+
+ // CHECK: call float @llvm.acos.f32
+ llvm.intr.acos(%arg0) : (f32) -> f32
+ // CHECK: call <8 x float> @llvm.acos.v8f32
+ llvm.intr.acos(%arg1) : (vector<8xf32>) -> vector<8xf32>
+
+ // CHECK: call float @llvm.atan.f32
+ llvm.intr.atan(%arg0) : (f32) -> f32
+ // CHECK: call <8 x float> @llvm.atan.v8f32
+ llvm.intr.atan(%arg1) : (vector<8xf32>) -> vector<8xf32>
+
+ llvm.return
+}
+
// CHECK-LABEL: @hyperbolic_trig_test
llvm.func @hyperbolic_trig_test(%arg0: f32, %arg1: vector<8xf32>) {
// CHECK: call float @llvm.sinh.f32
``````````
</details>
https://github.com/llvm/llvm-project/pull/127317
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