[Mlir-commits] [mlir] [MLIR][LLVM] Add isnan intrinsic (PR #127288)
William Moses
llvmlistbot at llvm.org
Fri Feb 14 16:58:05 PST 2025
https://github.com/wsmoses created https://github.com/llvm/llvm-project/pull/127288
None
>From a80e4051f1deb47044211bd411d9230e86953e5c Mon Sep 17 00:00:00 2001
From: "William S. Moses" <gh at wsmoses.com>
Date: Fri, 14 Feb 2025 18:56:32 -0600
Subject: [PATCH] [MLIR][LLVM] Add isnan intrinsic
---
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td | 2 ++
mlir/test/Target/LLVMIR/Import/intrinsic.ll | 12 ++++++++++++
mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir | 10 ++++++++++
3 files changed, 24 insertions(+)
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index 72fae1bdbf461..ad431a50bef36 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -174,6 +174,8 @@ def LLVM_SinhOp : LLVM_UnaryIntrOpF<"sinh">;
def LLVM_CoshOp : LLVM_UnaryIntrOpF<"cosh">;
def LLVM_TanhOp : LLVM_UnaryIntrOpF<"tanh">;
+def LLVM_IsNanOp : LLVM_UnaryIntrOpF<"isnan">;
+
class LLVM_MemcpyIntrOpBase<string name> :
LLVM_ZeroResultIntrOp<name, [0, 1, 2],
[DeclareOpInterfaceMethods<PromotableMemOpInterface>,
diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
index 249a0552c87f3..53c52aa96efbe 100644
--- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -139,6 +139,16 @@ define void @hyperbolic_trig_test(float %0, <8 x float> %1) {
ret void
}
+; CHECK-LABEL: llvm.func @isnan_test
+define void @isnan_test(float %0, <8 x float> %1) {
+ ; CHECK: llvm.intr.isnan(%{{.*}}) : (f32) -> i1
+ %3 = call i1 @llvm.isnan.f32(float %0)
+ ; CHECK: llvm.intr.isnan(%{{.*}}) : (vector<8xf32>) -> vector<8xi1>
+ %4 = call <8 x i1> @llvm.sinh.v8f32(<8 x float> %1)
+
+ ret void
+}
+
; CHECK-LABEL: llvm.func @copysign_test
define void @copysign_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
; CHECK: llvm.intr.copysign(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
@@ -1017,6 +1027,8 @@ declare float @llvm.cosh.f32(float)
declare <8 x float> @llvm.cosh.v8f32(<8 x float>)
declare float @llvm.tanh.f32(float)
declare <8 x float> @llvm.tanh.v8f32(<8 x float>)
+declare float @llvm.isnan.f32(float)
+declare <8 x float> @llvm.isnan.v8f32(<8 x float>)
declare float @llvm.copysign.f32(float, float)
declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>)
declare float @llvm.pow.f32(float, float)
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index 2c208789e36dd..7661b6e87b489 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -141,6 +141,16 @@ llvm.func @hyperbolic_trig_test(%arg0: f32, %arg1: vector<8xf32>) {
llvm.return
}
+// CHECK-LABEL: @isnan_test
+llvm.func @isnan_test(%arg0: f32, %arg1: vector<8xf32>) {
+ // CHECK: call i1 @llvm.isnan.f32
+ llvm.intr.isnan(%arg0) : (f32) -> i1
+ // CHECK: call <8 x i1> @llvm.isnan.v8f32
+ llvm.intr.sinh(%arg1) : (vector<8xf32>) -> vector<8xi1>
+
+ llvm.return
+}
+
// CHECK-LABEL: @copysign_test
llvm.func @copysign_test(%arg0: f32, %arg1: f32, %arg2: vector<8xf32>, %arg3: vector<8xf32>) {
// CHECK: call float @llvm.copysign.f32
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