[Mlir-commits] [mlir] [mlir][spirv] Add definition for OpGroupNonUniformBallotBitCount (PR #126055)

Igor Wodiany llvmlistbot at llvm.org
Thu Feb 6 07:01:34 PST 2025


================
@@ -1287,4 +1297,70 @@ def SPIRV_GroupNonUniformLogicalXorOp :
 
 // -----
 
+def SPIRV_GroupNonUniformBallotBitCountOp : SPIRV_Op<"GroupNonUniformBallotBitCount", [
+  SPIRV_ExecutionScopeAttrIs<"execution_scope", "Subgroup">,
+  SPIRV_GroupOperationAttrIs<"group_operation", "Reduce">
+]> {
+  let summary = [{
+    Result is the number of bits that are set to 1 in Value, considering
+    only the bits in Value required to represent all bits of the scope
+    restricted tangle.
+  }];
+
+  let description = [{
+    Result Type must be a scalar of integer type, whose Signedness operand
+    is 0.
+
+    Execution is the scope defining the scope restricted tangle affected by
+    this command. It must be Subgroup.
+
+    The identity I for Operation is 0.
+
+    Value must be a vector of four components of integer type scalar, whose
+    Width operand is 32 and whose Signedness operand is 0.
+
+    Value is a set of bitfields where the first invocation is represented in
+    the lowest bit of the first vector component and the last (up to the
+    size of the scope) is the higher bit number of the last bitmask needed
+    to represent all bits of the invocations in the scope restricted tangle.
+
+    An invocation will not execute a dynamic instance of this instruction
+    (X') until all invocations in its scope restricted tangle have executed
+    all dynamic instances that are program-ordered before X'.
+
+    <!-- End of AutoGen section -->
+
+    #### Example:
+
+    ```mlir
+    %count = spirv.GroupNonUniformBallotBitCount <Subgroup> <Reduce> %val : vector<4xi32> -> i32
+    ```
+  }];
+
+  let availability = [
+    MinVersion<SPIRV_V_1_3>,
+    MaxVersion<SPIRV_V_1_6>,
+    Extension<[]>,
+    Capability<[SPIRV_C_GroupNonUniformBallot]>
+  ];
+
+  let arguments = (ins
+    SPIRV_ScopeAttr:$execution_scope,
+    SPIRV_GroupOperationAttr:$group_operation,
+    SPIRV_IOrUIVec4:$value
+  );
+
+  let results = (outs
+    SPIRV_SignlessOrUnsignedInt:$result
----------------
IgWod-IMG wrote:

Yes. So, the vector type is `SPIRV_IOrUIVec4` which is defined as `SPIRV_Vec4<SPIRV_SignlessOrUnsignedInt>`. So, both `$result` and `$value` have the same element type. I think the **I** in SPIRV_**I**OrUIVec4 is a bit unfortunate and may indicate that a signed type is allowed, but that's not the case.

Spec just for the reference (0 means unsigned or signless):

> Result Type must be a scalar of integer type, whose Signedness operand is 0.
> Value must be a vector of four components of integer type scalar, whose Width operand is 32 and whose Signedness operand is 0.

Also, I have just realised that I missed the fact that element in `$value` must be 32-bits. I'll constrain that further.

https://github.com/llvm/llvm-project/pull/126055


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