[Mlir-commits] [mlir] [MLIR] Support non-atomic RMW option for emulated vector stores (PR #124887)

[Alan Li]

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@@ -363,6 +363,28 @@ static void atomicStore(OpBuilder &builder, Location loc,
   builder.create<memref::AtomicYieldOp>(loc, scalarMaskedValue);
 }
 
+/// Generate a non-atomic read-modify-write sequence for subbyte storing.
+/// It has similar logic to `atomicRMWStore`, but without atomicity.
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lialan wrote:

got it. I can see there are many places still using `sub-byte` descriptions. Let's update those to be consistent later.

https://github.com/llvm/llvm-project/pull/124887