[Mlir-commits] [mlir] [MLIR] Support non-atomic RMW option for emulated vector stores (PR #124887)

Andrzej WarzyƄski llvmlistbot at llvm.org
Mon Feb 3 09:33:26 PST 2025


================
@@ -611,13 +636,31 @@ struct ConvertVectorStore final : OpConversionPattern<vector::StoreOp> {
       auto backMask = rewriter.create<arith::ConstantOp>(
           loc, DenseElementsAttr::get(subWidthStoreMaskType, maskValues));
 
-      atomicStore(rewriter, loc, memrefBase, currentDestIndex,
-                  cast<VectorValue>(subWidthStorePart), backMask.getResult());
+      subEmulatedWidthStore(rewriter, loc, memrefBase, currentDestIndex,
+                            cast<VectorValue>(subWidthStorePart),
+                            backMask.getResult());
----------------
banach-space wrote:

I would make this more explicit and skip `subEmulatedWidthStore` altogether:
```suggestion
      useAtomicWrites ?
      atomicStore(rewriter, loc, memrefBase, currentDestIndex,
                            cast<VectorValue>(subWidthStorePart),
                            backMask.getResult())
       : rmwStore(rewriter, loc, memrefBase, currentDestIndex,
                            cast<VectorValue>(subWidthStorePart),
                            backMask.getResult());
```

In particular, I wouldn't worry about the signatures being identical. In fact, no harm if these two diverge.

Separately, the names should make it clear that one hook generates "atomic RMW" and the other "non-atomic RMW" (IIUC, both generate **RMW** sequence). 

https://github.com/llvm/llvm-project/pull/124887


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