[Mlir-commits] [mlir] [mlir][vector] Fix masked load/store emulation for rank-0 memrefs (PR #173325)

[Andrzej Warzyński]

https://github.com/banach-space commented:

Thanks!

I see two possible solutions here. One is the one that you implemented and it involves inserting `memref.reinterpret_cast`. 

The other solution would be making sure that rank-0 memrefs do not expect indices and the logic that currently fails has a special case for this. This solution wouldn't require injecting new Ops. Why not select this approach?

https://github.com/llvm/llvm-project/pull/173325