[Mlir-commits] [mlir] [mlir][rocdl] Add `s_nop` intrinsic (PR #172918)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Thu Dec 18 14:49:44 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-llvm
Author: Ivan Butygin (Hardcode84)
<details>
<summary>Changes</summary>
---
Patch is 20.20 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/172918.diff
3 Files Affected:
- (modified) mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td (+46-41)
- (modified) mlir/test/Dialect/LLVMIR/rocdl.mlir (+8-1)
- (modified) mlir/test/Target/LLVMIR/rocdl.mlir (+21-14)
``````````diff
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index 875041abfcfd8..f0a9d97b6daaf 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -82,7 +82,7 @@ def ROCDL_Dialect : Dialect {
(if relevant) and include usage examples. Operations should have
parser/printer tests in `mlir/test/Dialect/LLVMIR/rocdl.mlir` and
lowering tests in `mlir/test/Target/LLVMIR/rocdl.mlir`.
-
+
# General documentation (What does this op do?)
While rocdl ops sometimes carry their own documentation, there is no
@@ -391,6 +391,11 @@ def ROCDL_SSleepOp : ROCDL_ConcreteNonMemIntrOp<"s.sleep", [], 0, [0], ["count"]
let assemblyFormat = "attr-dict $count";
}
+def ROCDL_SNopOp : ROCDL_ConcreteNonMemIntrOp<"s.nop", [], 0, [0], ["count"]>,
+ Arguments<(ins I16Attr:$count)> {
+ let assemblyFormat = "attr-dict $count";
+}
+
def ROCDL_SBarrierOp : ROCDL_ConcreteNonMemIntrOp<"s.barrier", [], 0> {
let assemblyFormat = "attr-dict";
}
@@ -712,8 +717,8 @@ def ROCDL_smfmac_f32_32x32x64_fp8_fp8 : ROCDL_Mfma_IntrOp<"smfmac.f32.32x32x64.f
// WMMA intrinsics
class ROCDL_WMMA_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [0], [], 1, 0, 0, 0, [], []>,
- Arguments<(ins
- LLVM_ScalarOrVectorOf<AB>:$a,
+ Arguments<(ins
+ LLVM_ScalarOrVectorOf<AB>:$a,
LLVM_ScalarOrVectorOf<AB>:$b,
LLVM_ScalarOrVectorOf<CD>:$c)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
@@ -724,10 +729,10 @@ class ROCDL_WMMA_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemon
class ROCDL_WMMA_Opsel_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [1], [], 1, 0, 0, 0, [3], ["opsel"]>,
- Arguments<(ins
+ Arguments<(ins
LLVM_ScalarOrVectorOf<AB>:$a,
LLVM_ScalarOrVectorOf<AB>:$b,
- LLVM_ScalarOrVectorOf<CD>:$c,
+ LLVM_ScalarOrVectorOf<CD>:$c,
DefaultValuedAttr<I1Attr, "0">:$opsel)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
let assemblyFormat = [{
@@ -737,12 +742,12 @@ class ROCDL_WMMA_Opsel_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<
class ROCDL_WMMA_IU_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [1], [], 1, 0, 0, 0, [0, 2, 5], ["signA", "signB", "clamp"]>,
- Arguments<(ins
+ Arguments<(ins
DefaultValuedAttr<I1Attr, "0">:$signA,
- LLVM_ScalarOrVectorOf<AB>:$a,
+ LLVM_ScalarOrVectorOf<AB>:$a,
DefaultValuedAttr<I1Attr, "0">:$signB,
LLVM_ScalarOrVectorOf<AB>:$b,
- LLVM_ScalarOrVectorOf<CD>:$c,
+ LLVM_ScalarOrVectorOf<CD>:$c,
DefaultValuedAttr<I1Attr, "0">:$clamp)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
let assemblyFormat = [{
@@ -752,14 +757,14 @@ class ROCDL_WMMA_IU_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mne
class ROCDL_WMMA_ModsAll_Reuse_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [1], [], 1, 0, 0, 0, [0, 2, 4, 6, 7], ["signA", "signB","modC","reuseA","reuseB"]>,
- Arguments<(ins
+ Arguments<(ins
DefaultValuedAttr<I1Attr, "0">:$signA,
- LLVM_ScalarOrVectorOf<AB>:$a,
+ LLVM_ScalarOrVectorOf<AB>:$a,
DefaultValuedAttr<I1Attr, "0">:$signB,
LLVM_ScalarOrVectorOf<AB>:$b,
- DefaultValuedAttr<I16Attr, "0">:$modC,
- LLVM_ScalarOrVectorOf<CD>:$c,
- DefaultValuedAttr<I1Attr, "0">:$reuseA,
+ DefaultValuedAttr<I16Attr, "0">:$modC,
+ LLVM_ScalarOrVectorOf<CD>:$c,
+ DefaultValuedAttr<I1Attr, "0">:$reuseA,
DefaultValuedAttr<I1Attr, "0">:$reuseB)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
let assemblyFormat = [{
@@ -769,12 +774,12 @@ class ROCDL_WMMA_ModsAll_Reuse_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL
class ROCDL_WMMA_ModsC_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [0], [], 1, 0, 0, 0, [2, 4, 5], ["modC","reuseA","reuseB"]>,
- Arguments<(ins
- LLVM_ScalarOrVectorOf<AB>:$a,
+ Arguments<(ins
+ LLVM_ScalarOrVectorOf<AB>:$a,
LLVM_ScalarOrVectorOf<AB>:$b,
- DefaultValuedAttr<I16Attr, "0">:$modC,
- LLVM_ScalarOrVectorOf<CD>:$c,
- DefaultValuedAttr<I1Attr, "0">:$reuseA,
+ DefaultValuedAttr<I16Attr, "0">:$modC,
+ LLVM_ScalarOrVectorOf<CD>:$c,
+ DefaultValuedAttr<I1Attr, "0">:$reuseA,
DefaultValuedAttr<I1Attr, "0">:$reuseB)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
let assemblyFormat = [{
@@ -784,14 +789,14 @@ class ROCDL_WMMA_ModsC_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<
class ROCDL_WMMA_ModsAll_Diff_IntrOp<string mnemonic, Type AB, Type C, Type D> : ROCDL_IntrOp<mnemonic,
[0], [1, 5], [], 1, 0, 0, 0, [0, 2, 4, 6, 7], ["signA", "signB","modC","reuseA","reuseB"]>,
- Arguments<(ins
+ Arguments<(ins
DefaultValuedAttr<I1Attr, "0">:$signA,
- LLVM_ScalarOrVectorOf<AB>:$a,
+ LLVM_ScalarOrVectorOf<AB>:$a,
DefaultValuedAttr<I1Attr, "0">:$signB,
LLVM_ScalarOrVectorOf<AB>:$b,
- DefaultValuedAttr<I16Attr, "0">:$modC,
- LLVM_ScalarOrVectorOf<C>:$c,
- DefaultValuedAttr<I1Attr, "0">:$reuseA,
+ DefaultValuedAttr<I16Attr, "0">:$modC,
+ LLVM_ScalarOrVectorOf<C>:$c,
+ DefaultValuedAttr<I1Attr, "0">:$reuseA,
DefaultValuedAttr<I1Attr, "0">:$reuseB)> {
let results = (outs LLVM_ScalarOrVectorOf<D>:$res);
let assemblyFormat = [{
@@ -801,13 +806,13 @@ class ROCDL_WMMA_ModsAll_Diff_IntrOp<string mnemonic, Type AB, Type C, Type D> :
class ROCDL_WMMA_ModsAB_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp<mnemonic,
[0], [1], [], 1, 0, 0, 0, [0, 2, 5, 6], ["signA", "signB", "reuseA","reuseB"]>,
- Arguments<(ins
+ Arguments<(ins
DefaultValuedAttr<I1Attr, "0">:$signA,
- LLVM_ScalarOrVectorOf<AB>:$a,
+ LLVM_ScalarOrVectorOf<AB>:$a,
DefaultValuedAttr<I1Attr, "0">:$signB,
LLVM_ScalarOrVectorOf<AB>:$b,
- LLVM_ScalarOrVectorOf<CD>:$c,
- DefaultValuedAttr<I1Attr, "0">:$reuseA,
+ LLVM_ScalarOrVectorOf<CD>:$c,
+ DefaultValuedAttr<I1Attr, "0">:$reuseA,
DefaultValuedAttr<I1Attr, "0">:$reuseB)> {
let results = (outs LLVM_ScalarOrVectorOf<CD>:$res);
let assemblyFormat = [{
@@ -818,15 +823,15 @@ class ROCDL_WMMA_ModsAB_IntrOp<string mnemonic, Type AB, Type CD> : ROCDL_IntrOp
// Overloaded operands: [1, 3] refers to LLVM intrinsic parameter positions where
// A is at position 1 and B is at position 3 (after format parameters).
class ROCDL_WMMA_Scale_IntrOp<string mnemonic, Type AB, Type CD, Type ScaleExpTy> : ROCDL_IntrOp<mnemonic,
- [0], [1, 3], [], 1, 0, 0, 0, [0, 2, 4, 6, 7, 9, 10, 12, 13],
- ["fmtA", "fmtB", "modC", "scaleAType", "fmtScaleA",
+ [0], [1, 3], [], 1, 0, 0, 0, [0, 2, 4, 6, 7, 9, 10, 12, 13],
+ ["fmtA", "fmtB", "modC", "scaleAType", "fmtScaleA",
"scaleBType", "fmtScaleB", "reuseA", "reuseB"]>,
- Arguments<(ins
+ Arguments<(ins
DefaultValuedAttr<I32Attr, "0">:$fmtA,
- LLVM_ScalarOrVectorOf<AB>:$a,
+ LLVM_ScalarOrVectorOf<AB>:$a,
DefaultValuedAttr<I32Attr, "0">:$fmtB,
LLVM_ScalarOrVectorOf<AB>:$b,
- DefaultValuedAttr<I16Attr, "0">:$modC,
+ DefaultValuedAttr<I16Attr, "0">:$modC,
LLVM_ScalarOrVectorOf<CD>:$c,
DefaultValuedAttr<I32Attr, "0">:$scaleAType,
DefaultValuedAttr<I32Attr, "0">:$fmtScaleA,
@@ -843,13 +848,13 @@ class ROCDL_WMMA_Scale_IntrOp<string mnemonic, Type AB, Type CD, Type ScaleExpTy
}
class ROCDL_WMMA_Scale_F4_IntrOp<string mnemonic, Type AB, Type CD, Type ScaleExpTy> : ROCDL_IntrOp<mnemonic,
- [0], [0, 1], [], 1, 0, 0, 0, [2, 4, 5, 7, 8, 10, 11],
- ["modC", "scaleAType", "fmtScaleA",
+ [0], [0, 1], [], 1, 0, 0, 0, [2, 4, 5, 7, 8, 10, 11],
+ ["modC", "scaleAType", "fmtScaleA",
"scaleBType", "fmtScaleB", "reuseA", "reuseB"]>,
- Arguments<(ins
- LLVM_ScalarOrVectorOf<AB>:$a,
+ Arguments<(ins
+ LLVM_ScalarOrVectorOf<AB>:$a,
LLVM_ScalarOrVectorOf<AB>:$b,
- DefaultValuedAttr<I16Attr, "0">:$modC,
+ DefaultValuedAttr<I16Attr, "0">:$modC,
LLVM_ScalarOrVectorOf<CD>:$c,
DefaultValuedAttr<I32Attr, "0">:$scaleAType,
DefaultValuedAttr<I32Attr, "0">:$fmtScaleA,
@@ -1355,7 +1360,7 @@ def ROCDL_DsAtomicAsyncBarrierArriveOp :
dag args = (ins Arg<ROCDLBufferLDS, "", [MemWrite]>:$barrierPtr);
let arguments = !con(args, baseArgs);
let description = [{
- Waits on a given DS barrier and decrements pending count by -1.
+ Waits on a given DS barrier and decrements pending count by -1.
Stays in order with ASYNC loads to LDS, and uses ASYNCcnt to track its completion.
Available on gfx1250+.
}];
@@ -2091,14 +2096,14 @@ def ROCDL_FMed3Op : ROCDL_IntrOp<"fmed3", [0], [], [Pure, AllTypesMatch<["res",
Computes the median of three floating-point values using the AMDGPU fmed3 intrinsic.
This operation is equivalent to `max(min(a, b), min(max(a, b), c))` but uses the
hardware-accelerated V_MED3_F16/V_MED3_F32 instruction for better performance.
-
+
The operation supports both scalar and vector floating-point types (f16, f32).
-
+
Example:
```mlir
// Scalar f32 median
%result = rocdl.fmed3 %a, %b, %c : f32
-
+
// Vector f16 median
%result = rocdl.fmed3 %va, %vb, %vc : vector<4xf16>
```
diff --git a/mlir/test/Dialect/LLVMIR/rocdl.mlir b/mlir/test/Dialect/LLVMIR/rocdl.mlir
index 750ba1c2a5eea..b630fb86a5ab2 100644
--- a/mlir/test/Dialect/LLVMIR/rocdl.mlir
+++ b/mlir/test/Dialect/LLVMIR/rocdl.mlir
@@ -961,7 +961,7 @@ llvm.func @rocdl.global.prefetch(%ptr : !llvm.ptr<1>) {
llvm.func @rocdl.flat.prefetch(%ptr : !llvm.ptr) {
// CHECK-LABEL: rocdl.flat.prefetch
- // CHECK: rocdl.flat.prefetch %{{.*}}, scope 0 : !llvm.ptr
+ // CHECK: rocdl.flat.prefetch %{{.*}}, scope 0 : !llvm.ptr
rocdl.flat.prefetch %ptr, scope 0 : !llvm.ptr
llvm.return
}
@@ -1190,6 +1190,13 @@ llvm.func @rocdl.s.sleep() {
llvm.return
}
+llvm.func @rocdl.s.nop() {
+ // CHECK-LABEL: rocdl.s.nop
+ // CHECK: rocdl.s.nop 0
+ rocdl.s.nop 0
+ llvm.return
+}
+
llvm.func @rocdl.s.barrier() {
// CHECK-LABEL: rocdl.s.barrier
// CHECK: rocdl.s.barrier
diff --git a/mlir/test/Target/LLVMIR/rocdl.mlir b/mlir/test/Target/LLVMIR/rocdl.mlir
index 1aba52f6cdaa8..9022beb71ee31 100644
--- a/mlir/test/Target/LLVMIR/rocdl.mlir
+++ b/mlir/test/Target/LLVMIR/rocdl.mlir
@@ -234,6 +234,13 @@ llvm.func @rocdl.s.sleep() {
llvm.return
}
+llvm.func @rocdl.s.nop() {
+ // CHECK-LABEL: rocdl.s.nop
+ // CHECK-NEXT: call void @llvm.amdgcn.s.nop(i16 0)
+ rocdl.s.nop 0
+ llvm.return
+}
+
llvm.func @rocdl.s.barrier() {
// CHECK-LABEL: rocdl.s.barrier
// CHECK-NEXT: call void @llvm.amdgcn.s.barrier()
@@ -1019,7 +1026,7 @@ llvm.func @rocdl.mfma.scale.f32.16x16x128.f8f6f4(%arg0 : i32,
llvm.func @rocdl.wmma(%arg0 : vector<8xf32>, %arg1 : vector<16 x f16>, %arg2 : vector<16 x i16>, %arg3 : vector<8 x i32>,
%arg4 : vector<2xi32>, %arg5 : vector<4xi32>, %arg6 : vector<4xf32>, %arg7 : vector<8xf16>, %arg8 : vector<8xi16>,
- %arg9 : vector<32xf16>, %arg10 : vector<16xf32>, %arg11 : vector<4xf32>, %arg12 : vector<32xf32>, %arg13 : vector<64xf32>,
+ %arg9 : vector<32xf16>, %arg10 : vector<16xf32>, %arg11 : vector<4xf32>, %arg12 : vector<32xf32>, %arg13 : vector<64xf32>,
%arg14 : vector<64xi32>, %arg15 : vector<64xf16>, %arg16 : vector<16xbf16>, %arg17 : vector<32xbf16>) -> vector<8xf32> {
// ---- Wave32 -----
@@ -1152,7 +1159,7 @@ llvm.func @rocdl.wmma(%arg0 : vector<8xf32>, %arg1 : vector<16 x f16>, %arg2 : v
// CHECK: call <64 x i32> @llvm.amdgcn.wmma.i32.16x16x64.iu8.v64i32.v4i32(i1 false, <4 x i32> %{{.*}} i1 false, <4 x i32> %{{.*}} <64 x i32> %{{.*}} i1 false, i1 false)
%r23.gfx1250 = rocdl.wmma.i32.16x16x64.iu8 %arg5, %arg5, %arg14 {signA = false, signB = false} : (vector<4xi32>, vector<4xi32>, vector<64xi32>) -> vector<64xi32>
- // Test signA=true, signB=true for iu8 gfx1250
+ // Test signA=true, signB=true for iu8 gfx1250
// CHECK: call <64 x i32> @llvm.amdgcn.wmma.i32.16x16x64.iu8.v64i32.v4i32(i1 true, <4 x i32> %{{.*}} i1 true, <4 x i32> %{{.*}} <64 x i32> %{{.*}} i1 false, i1 false)
%r23a.gfx1250 = rocdl.wmma.i32.16x16x64.iu8 %arg5, %arg5, %arg14 {signA = true, signB = true} : (vector<4xi32>, vector<4xi32>, vector<64xi32>) -> vector<64xi32>
@@ -1448,7 +1455,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
%arg3: vector<12xi32>, %arg5: vector<16xi32>,
%arg8: i64, %arg9: vector<8xf32>) -> vector<4xf32> {
// CHECK-LABEL: rocdl.wmma.scale
-
+
// Test with default attributes (all zeros/false)
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 0, <16 x i32> %{{.*}}, i32 0, <16 x i32> %{{.*}}, i16 0, <4 x float> %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i1 false, i1 false)
%r00 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg0, %arg0
@@ -1457,7 +1464,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 0 : i32, fmtScaleB = 0 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with different matrix formats (FP8 x BF8)
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 0, <16 x i32> %{{.*}}, i32 1, <16 x i32> %{{.*}}, i16 0, <4 x float> %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i1 false, i1 false)
%r01 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg0, %arg0
@@ -1466,7 +1473,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 1 : i32, fmtScaleB = 1 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with FP8 x FP6 (different vector sizes) and modC = 1 (negate)
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v12i32(i32 0, <16 x i32> %{{.*}}, i32 2, <12 x i32> %{{.*}}, i16 1, <4 x float> %{{.*}}, i32 2, i32 2, i32 %{{.*}}, i32 2, i32 2, i32 %{{.*}}, i1 false, i1 false)
%r02 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg3, %arg1, %arg0, %arg0
@@ -1475,7 +1482,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 2 : i32, fmtScaleB = 2 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<12xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with BF8 x BF6 and modC = 2 (abs)
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v12i32(i32 1, <16 x i32> %{{.*}}, i32 3, <12 x i32> %{{.*}}, i16 2, <4 x float> %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i1 false, i1 false)
%r03 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg3, %arg1, %arg0, %arg0
@@ -1484,7 +1491,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 0 : i32, fmtScaleB = 0 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<12xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with FP8 x FP4 and modC = 3 (negate(abs))
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v8i32(i32 0, <16 x i32> %{{.*}}, i32 4, <8 x i32> %{{.*}}, i16 3, <4 x float> %{{.*}}, i32 3, i32 3, i32 %{{.*}}, i32 3, i32 3, i32 %{{.*}}, i1 false, i1 false)
%r04 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg2, %arg1, %arg0, %arg0
@@ -1493,7 +1500,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 3 : i32, fmtScaleB = 3 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<8xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with reuseA = true
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 2, <16 x i32> %{{.*}}, i32 2, <16 x i32> %{{.*}}, i16 0, <4 x float> %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i1 true, i1 false)
%r10 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg0, %arg0
@@ -1502,7 +1509,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 0 : i32, fmtScaleB = 0 : i32,
reuseA = true, reuseB = false} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with reuseB = true
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 3, <16 x i32> %{{.*}}, i32 3, <16 x i32> %{{.*}}, i16 0, <4 x float> %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i32 0, i32 0, i32 %{{.*}}, i1 false, i1 true)
%r11 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg0, %arg0
@@ -1511,7 +1518,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 0 : i32, fmtScaleB = 0 : i32,
reuseA = false, reuseB = true} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test with both reuseA and reuseB = true
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 4, <16 x i32> %{{.*}}, i32 4, <16 x i32> %{{.*}}, i16 1, <4 x float> %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i1 true, i1 true)
%r12 = rocdl.wmma.scale.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg0, %arg0
@@ -1520,7 +1527,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 1 : i32, fmtScaleB = 1 : i32,
reuseA = true, reuseB = true} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i32, i32) -> vector<4xf32>
-
+
// Test scale16 variant with i64 scale exponents
// CHECK: call <4 x float> @llvm.amdgcn.wmma.scale16.f32.16x16x128.f8f6f4.v4f32.v16i32.v16i32(i32 0, <16 x i32> %{{.*}}, i32 1, <16 x i32> %{{.*}}, i16 2, <4 x float> %{{.*}}, i32 2, i32 2, i64 %{{.*}}, i32 2, i32 2, i64 %{{.*}}, i1 false, i1 false)
%r_scale16 = rocdl.wmma.scale16.f32.16x16x128.f8f6f4 %arg5, %arg5, %arg1, %arg8, %arg8
@@ -1529,7 +1536,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 2 : i32, fmtScaleB = 2 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<16xi32>, vector<4xf32>, i64, i64) -> vector<4xf32>
-
+
// Test f4 variant (no matrix format parameters)
// CHECK: call <8 x float> @llvm.amdgcn.wmma.scale.f32.32x16x128.f4.v8f32.v16i32.v8i32(<16 x i32> %{{.*}}, <8 x i32> %{{.*}}, i16 0, <8 x float> %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i32 1, i32 1, i32 %{{.*}}, i1 false, i1 false)
%r_f4 = rocdl.wmma.scale.f32.32x16x128.f4 %arg5, %arg2, %arg9, %arg0, %arg0
@@ -1538,7 +1545,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
scaleBType = 1 : i32, fmtScaleB = 1 : i32,
reuseA = false, reuseB = false} :
(vector<16xi32>, vector<8xi32>, vector<8xf32>, i32, i32) -> vector<8xf32>
-
+
// Test f4 scale16 variant with varied attributes
// CHECK: call <8 x float> @llvm.amdgcn.wmma.scale16.f32.32x16x128.f4.v8f32.v16i32.v8i32(<16 x i32> %{{.*}}, <8 x i32> %{{.*}}, i16 3, <8 x float> %{{.*}}, i32 2, i32 3, i64 %{{.*}}, i32 3, i32 2, i64 %{{.*}}, i1 true, i1 true)
%r_f4_scale16 = rocdl.wmma.scale16.f32.32x16x128.f4 %arg5, %arg2, %arg9, %arg8, %arg8
@@ -1547,7 +1554,7 @@ llvm.func @rocdl.wmma.scale(%arg0: i32, %arg1: vector<4xf32>, %arg2: vector<8xi3
...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/172918
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