[Mlir-commits] [mlir] e7ef722 - [MLIR][XeGPU] Fix the test issue brought by PR172125 (#172742)

[llvmlistbot at llvm.org]

Author: Jianhui Li
Date: 2025-12-17T22:06:48Z
New Revision: e7ef7229d37690f66ea5a70f9b2e3c0bb2943c18

URL: https://github.com/llvm/llvm-project/commit/e7ef7229d37690f66ea5a70f9b2e3c0bb2943c18
DIFF: https://github.com/llvm/llvm-project/commit/e7ef7229d37690f66ea5a70f9b2e3c0bb2943c18.diff

LOG: [MLIR][XeGPU] Fix the test issue brought by PR172125 (#172742)

Fix merge test issue brought by
https://github.com/llvm/llvm-project/pull/172125

Added: 
    

Modified: 
    mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir

Removed: 
    


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diff  --git a/mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir b/mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
index c7dfc9fb7b1f1..092a4cf442782 100644
--- a/mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+++ b/mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
@@ -7,7 +7,6 @@ gpu.module @test {
     // CHECK: %[[TDESC:.*]] = xegpu.create_nd_tdesc %[[ARG_0]] : memref<256x128xf32>
     // CHECK-SAME: -> !xegpu.tensor_desc<256x128xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>>
     // CHECK: %[[LOAD:.*]] = xegpu.load_nd %[[TDESC]] <{layout = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>}>
-    // CHECK-SAME: {layout_result_0 = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>}
     // CHECK-SAME: : !xegpu.tensor_desc<256x128xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>>
     // CHECK-SAME: -> vector<256x128xf32>
     // CHECK: xegpu.store_nd %[[LOAD]], %[[TDESC]] <{layout = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>}>
@@ -33,7 +32,6 @@ gpu.module @test {
     // CHECK-SAME: !xegpu.tensor_desc<128x256xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 64], order = [1, 0]>>
 
     // CHECK: %[[LOAD:.*]] = xegpu.load_nd %[[TDESC_LD]][0, 0] <{layout = #xegpu.layout<sg_layout = [4, 8], sg_data = [64, 32], order = [0, 1]>}>
-    // CHECK-SAME: {layout_result_0 = #xegpu.layout<sg_layout = [4, 8], sg_data = [64, 32], order = [0, 1]>} :
     // CHECK-SAME: !xegpu.tensor_desc<256x128xf32, #xegpu.layout<sg_layout = [4, 8], sg_data = [64, 32], order = [0, 1]>> -> vector<256x128xf32>
 
     // CHECK: %[[TRANSPOSED:.*]] = vector.transpose %2, [1, 0]