[Mlir-commits] [mlir] [mlir][x86vector] Lower BF16 vector.contract to FMA using AVX2 BF16 packed ops. (PR #170267)

[Adam Siemieniuk]

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@@ -215,6 +265,20 @@ struct VectorContractBF16ToFMA
           contractOp, "BF16 packed load operation expects non-unit (LHR or "
                       "RHS) dim and acc dim of size 4/8.");
 
+    if (!validateVectorProdOp(contractOp.getLhs()))
+      return rewriter.notifyMatchFailure(
+          contractOp,
+          "The LHS is in invalid format. Either it has false inbound or "
+          "non-identical permuation map or the vnni offset is not zero or src "
+          "is not MemRef type or has non-unit vnni stride");
+
+    if (!validateVectorProdOp(contractOp.getRhs()))
+      return rewriter.notifyMatchFailure(
+          contractOp,
+          "The LHS is in invalid format. Either it has false inbound or "
+          "non-identical permuation map or the vnni offset is not zero or src "
+          "is not MemRef type or has non-unit vnni stride");
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adam-smnk wrote:

Could you merge these two together?

https://github.com/llvm/llvm-project/pull/170267