[Mlir-commits] [mlir] [mlir][amdgpu] Lower make_gather_dma_descriptor. (PR #172083)
Erick Ochoa Lopez
llvmlistbot at llvm.org
Mon Dec 15 08:14:00 PST 2025
================
@@ -2896,8 +2933,86 @@ struct AMDGPUMakeDmaDescriptorLowering
return dgroup2;
}
+ Value getGatherIndices(DescriptorOp op, OpAdaptor adaptor,
+ ConversionPatternRewriter &rewriter, Location loc,
+ ArrayRef<Value> consts, bool firstHalf) const {
+ IntegerType i32 = rewriter.getI32Type();
+ Type v4i32 = this->typeConverter->convertType(VectorType::get(4, i32));
+ assert(v4i32 && "expected type conversion to succeed.");
+
+ MakeGatherDmaDescriptorOp descriptorOp =
+ cast<MakeGatherDmaDescriptorOp>(op);
+ if (!descriptorOp.getIndices())
+ return LLVM::PoisonOp::create(rewriter, loc, v4i32);
+
+ MakeGatherDmaDescriptorOpAdaptor castedAdaptor =
+ MakeGatherDmaDescriptorOpAdaptor(descriptorOp);
+ Value indices = castedAdaptor.getIndices();
+
+ auto vectorType = cast<VectorType>(indices.getType());
+ unsigned length = vectorType.getShape().back();
+ Type elementType = vectorType.getElementType();
+ unsigned maxLength = elementType == i32 ? 4 : 8;
+ int32_t offset = firstHalf ? 0 : maxLength;
+ unsigned discountedLength =
+ std::max(static_cast<int32_t>(length - offset), 0);
+
+ unsigned targetSize = std::min(maxLength, discountedLength);
+
+ SmallVector<Value> indicesVector;
+ for (unsigned i = offset; i < targetSize + offset; i++) {
+ Value idx;
+ if (i < consts.size())
+ idx = consts[i];
+ else
+ idx = createI32Constant(rewriter, loc, i);
+ Value elem = LLVM::ExtractElementOp::create(rewriter, loc, indices, idx);
+ indicesVector.push_back(elem);
+ }
+
+ SmallVector<Value> indicesI32Vector;
+ if (elementType == i32)
+ indicesI32Vector = indicesVector;
+ else {
----------------
amd-eochoalo wrote:
https://github.com/llvm/llvm-project/pull/172083/commits/37ba4d27cf6f3329434fa0aa9c98e94086b8d1ff
https://github.com/llvm/llvm-project/pull/172083
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