[Mlir-commits] [mlir] [RFC][mlir][tosa] Remove NegateOp to SubOp and 48-bit promotion in TosaToLinalg (PR #170622)

[Luke Hutton]

================
@@ -666,7 +666,7 @@ func.func @test_simple_i32(%arg0: tensor<1xi32>, %unsigned: tensor<1xui32>, %uns
   // CHECK: linalg.generic
   // CHECK: ^bb0(%[[ARG1:.*]]: i32, %[[ARG2:.*]]: i32):
   // CHECK: [[ZERO:%.+]] = arith.constant 0
-  // CHECK: arith.subi [[ZERO]], %[[ARG1]]
+  // CHECK: arith.extsi %[[IN:.*]] : i32 to i64
----------------
lhutton1 wrote:

It seems these checks (similar for the tests below) are missing the operations that should follow? For example, I'd expect to see something like:
```
arith.extsi in
arith.extsi out
arith.subi
arith.minsi
arith.maxsi
arith.trunci
```

https://github.com/llvm/llvm-project/pull/170622