[Mlir-commits] [mlir] [mlir][amdgpu] Add tensor load store operations (PR #170918)

[Erick Ochoa Lopez]

================
@@ -2710,6 +2705,46 @@ struct AMDGPUMakeDmaDescriptorLowering
   }
 };
 
+template <typename SourceOp, typename TargetD2Op, typename TargetOp>
+struct AMDGPUTensorLoadStoreOpLowering
+    : public ConvertOpToLLVMPattern<SourceOp> {
+  using ConvertOpToLLVMPattern<SourceOp>::ConvertOpToLLVMPattern;
+  using Adaptor = typename ConvertOpToLLVMPattern<SourceOp>::OneToNOpAdaptor;
+  AMDGPUTensorLoadStoreOpLowering(const LLVMTypeConverter &converter,
+                                  Chipset chipset)
+      : ConvertOpToLLVMPattern<SourceOp>(converter), chipset(chipset) {}
+  Chipset chipset;
+
+  LogicalResult
+  matchAndRewrite(SourceOp op, Adaptor adaptor,
+                  ConversionPatternRewriter &rewriter) const override {
+    if (chipset < kGfx1250)
+      return op->emitOpError("is only supported on gfx1250");
+
+    ValueRange desc = adaptor.getDesc();
+    uint32_t temporalHint = static_cast<uint32_t>(op.getTemporalHint());
+    bool nonVolatile = static_cast<bool>(op.getNonVolatile());
----------------
amd-eochoalo wrote:

1 is volatile. 

https://github.com/llvm/llvm-project/pull/170918