[Mlir-commits] [mlir] [mlir][amdgpu] Add tensor load store operations (PR #170918)
Krzysztof Drewniak
llvmlistbot at llvm.org
Mon Dec 8 11:50:41 PST 2025
================
@@ -80,6 +80,97 @@ def AMDGPU_AddressSpaceAttr : EnumAttr<AMDGPU_Dialect, AMDGPU_AddressSpace,
let assemblyFormat = "`<` $value `>`";
}
+def AMDGPU_TemporalLoadHints : I32EnumAttr<"TemporalLoadHints",
+ "AMDGPU-specific temporal load hints",
+ [
+ I32EnumAttrCase<"RegularTemporal", 0, "regular">,
----------------
krzysz00 wrote:
So I'm going to call for not doing this at this time
There are still active discussion of how to represent these sorts of temporality hints in the compiler
https://github.com/llvm/llvm-project/pull/170918
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