[Mlir-commits] [mlir] [mlir][AMX] Memory effects to amx.tile_zero (PR #155403)

[Arun Thangamani]

arun-thmn wrote:

Updated `MemEffects` for `tileload` + added a test-case ensuring `CSE` doesn't fuse multiple `tilezero` and `tileload`

https://github.com/llvm/llvm-project/pull/155403