[Mlir-commits] [mlir] [SCFToAffine] Add a pass to raise scf to affine ops. (PR #152925)

Ming Yan llvmlistbot at llvm.org
Mon Aug 25 08:56:46 PDT 2025


https://github.com/NexMing updated https://github.com/llvm/llvm-project/pull/152925

>From 48dad4a635baad85a353a3371084cbee9a72c0d4 Mon Sep 17 00:00:00 2001
From: Ming Yan <nexming7 at gmail.com>
Date: Mon, 11 Aug 2025 00:14:47 +0800
Subject: [PATCH 1/7] [SCFToAffine] Add a pass to raise scf to affine ops.

This patch supports the conversion from `scf.for` to `affine.for`.
---
 mlir/include/mlir/Conversion/Passes.h         |   1 +
 mlir/include/mlir/Conversion/Passes.td        |  12 ++
 .../mlir/Conversion/SCFToAffine/SCFToAffine.h |  26 ++++
 mlir/lib/Conversion/CMakeLists.txt            |   1 +
 .../lib/Conversion/SCFToAffine/CMakeLists.txt |  17 +++
 .../Conversion/SCFToAffine/SCFToAffine.cpp    | 136 ++++++++++++++++++
 .../Conversion/SCFToAffine/scf-to-affine.mlir |  57 ++++++++
 7 files changed, 250 insertions(+)
 create mode 100644 mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h
 create mode 100644 mlir/lib/Conversion/SCFToAffine/CMakeLists.txt
 create mode 100644 mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
 create mode 100644 mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir

diff --git a/mlir/include/mlir/Conversion/Passes.h b/mlir/include/mlir/Conversion/Passes.h
index 91b2ecf8922a3..f6df794685484 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -58,6 +58,7 @@
 #include "mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h"
 #include "mlir/Conversion/PDLToPDLInterp/PDLToPDLInterp.h"
 #include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h"
+#include "mlir/Conversion/SCFToAffine/SCFToAffine.h"
 #include "mlir/Conversion/SCFToControlFlow/SCFToControlFlow.h"
 #include "mlir/Conversion/SCFToEmitC/SCFToEmitC.h"
 #include "mlir/Conversion/SCFToGPU/SCFToGPUPass.h"
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 2058aba7f9e37..57f726356cbbf 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -1027,6 +1027,18 @@ def ReconcileUnrealizedCastsPass : Pass<"reconcile-unrealized-casts"> {
   }];
 }
 
+//===----------------------------------------------------------------------===//
+// SCFToAffine
+//===----------------------------------------------------------------------===//
+
+def RaiseSCFToAffinePass : Pass<"raise-scf-to-affine"> {
+  let summary = "Raise SCF to affine ops";
+  let dependentDialects = [
+    "affine::AffineDialect",
+    "scf::SCFDialect",
+  ];
+}
+
 //===----------------------------------------------------------------------===//
 // SCFToControlFlow
 //===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h b/mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h
new file mode 100644
index 0000000000000..4f87ef8e6c6e4
--- /dev/null
+++ b/mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h
@@ -0,0 +1,26 @@
+//===- SCFToAffine.h - SCF to Affine Pass entrypoint ------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_CONVERSION_SCFTOAFFINE_SCFTOAFFINE_H_
+#define MLIR_CONVERSION_SCFTOAFFINE_SCFTOAFFINE_H_
+
+#include <memory>
+
+namespace mlir {
+class Pass;
+class RewritePatternSet;
+
+#define GEN_PASS_DECL_RAISESCFTOAFFINEPASS
+#include "mlir/Conversion/Passes.h.inc"
+
+/// Collect a set of patterns to convert SCF operations to Affine operations.
+void populateSCFToAffineConversionPatterns(RewritePatternSet &patterns);
+
+} // namespace mlir
+
+#endif // MLIR_CONVERSION_SCFTOAFFINE_SCFTOAFFINE_H_
diff --git a/mlir/lib/Conversion/CMakeLists.txt b/mlir/lib/Conversion/CMakeLists.txt
index 171f7169fd41d..da4e8704ef5a5 100644
--- a/mlir/lib/Conversion/CMakeLists.txt
+++ b/mlir/lib/Conversion/CMakeLists.txt
@@ -51,6 +51,7 @@ add_subdirectory(OpenACCToSCF)
 add_subdirectory(OpenMPToLLVM)
 add_subdirectory(PDLToPDLInterp)
 add_subdirectory(ReconcileUnrealizedCasts)
+add_subdirectory(SCFToAffine)
 add_subdirectory(SCFToControlFlow)
 add_subdirectory(SCFToEmitC)
 add_subdirectory(SCFToGPU)
diff --git a/mlir/lib/Conversion/SCFToAffine/CMakeLists.txt b/mlir/lib/Conversion/SCFToAffine/CMakeLists.txt
new file mode 100644
index 0000000000000..bf1494d6f3cf0
--- /dev/null
+++ b/mlir/lib/Conversion/SCFToAffine/CMakeLists.txt
@@ -0,0 +1,17 @@
+add_mlir_conversion_library(MLIRSCFToAffine
+  SCFToAffine.cpp
+
+  ADDITIONAL_HEADER_DIRS
+  ${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/SCFToAffine
+
+  DEPENDS
+  MLIRConversionPassIncGen
+
+  LINK_LIBS PUBLIC
+  MLIRArithDialect
+  MLIRAffineDialect
+  MLIRLLVMDialect
+  MLIRSCFDialect
+  MLIRSCFTransforms
+  MLIRTransforms
+  )
diff --git a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
new file mode 100644
index 0000000000000..35e662d88b488
--- /dev/null
+++ b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
@@ -0,0 +1,136 @@
+//===- SCFToAffine.cpp - SCF to Affine conversion -------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a pass to raise scf.for, scf.if and loop.terminator
+// ops into affine ops.
+//
+//===----------------------------------------------------------------------===//
+
+#include "mlir/Conversion/SCFToAffine/SCFToAffine.h"
+#include "mlir/Dialect/Affine/IR/AffineOps.h"
+#include "mlir/Dialect/SCF/IR/SCF.h"
+#include "mlir/IR/Verifier.h"
+#include "mlir/Transforms/DialectConversion.h"
+#include "mlir/Transforms/Passes.h"
+
+namespace mlir {
+#define GEN_PASS_DEF_RAISESCFTOAFFINEPASS
+#include "mlir/Conversion/Passes.h.inc"
+} // namespace mlir
+
+using namespace mlir;
+
+namespace {
+
+struct SCFToAffinePass
+    : public impl::RaiseSCFToAffinePassBase<SCFToAffinePass> {
+  void runOnOperation() override;
+};
+
+bool canRaiseToAffine(scf::ForOp op) {
+  return affine::isValidDim(op.getLowerBound()) &&
+         affine::isValidDim(op.getUpperBound()) &&
+         affine::isValidSymbol(op.getStep());
+}
+
+struct ForOpRewrite : public OpRewritePattern<scf::ForOp> {
+  using OpRewritePattern<scf::ForOp>::OpRewritePattern;
+
+  std::pair<affine::AffineForOp, Value>
+  createAffineFor(scf::ForOp op, PatternRewriter &rewriter) const {
+    if (auto constantStep = op.getStep().getDefiningOp<arith::ConstantOp>()) {
+      int64_t step = cast<IntegerAttr>(constantStep.getValue()).getInt();
+      if (step > 0)
+        return positiveConstantStep(op, step, rewriter);
+    }
+    return genericBounds(op, rewriter);
+  }
+
+  std::pair<affine::AffineForOp, Value>
+  positiveConstantStep(scf::ForOp op, int64_t step,
+                       PatternRewriter &rewriter) const {
+    auto affineFor = affine::AffineForOp::create(
+        rewriter, op.getLoc(), ValueRange(op.getLowerBound()),
+        AffineMap::get(1, 0, rewriter.getAffineDimExpr(0)),
+        ValueRange(op.getUpperBound()),
+        AffineMap::get(1, 0, rewriter.getAffineDimExpr(0)), step,
+        op.getInits());
+    return std::make_pair(affineFor, affineFor.getInductionVar());
+  }
+
+  std::pair<affine::AffineForOp, Value>
+  genericBounds(scf::ForOp op, PatternRewriter &rewriter) const {
+    Value lower = op.getLowerBound();
+    Value upper = op.getUpperBound();
+    Value step = op.getStep();
+    AffineExpr lowerExpr = rewriter.getAffineDimExpr(0);
+    AffineExpr upperExpr = rewriter.getAffineDimExpr(1);
+    AffineExpr stepExpr = rewriter.getAffineSymbolExpr(0);
+    auto affineFor = affine::AffineForOp::create(
+        rewriter, op.getLoc(), ValueRange(), rewriter.getConstantAffineMap(0),
+        ValueRange({lower, upper, step}),
+        AffineMap::get(
+            2, 1, (upperExpr - lowerExpr + stepExpr - 1).floorDiv(stepExpr)),
+        1, op.getInits());
+
+    rewriter.setInsertionPointToStart(affineFor.getBody());
+    auto actualIndexMap = AffineMap::get(
+        2, 1, lowerExpr + rewriter.getAffineDimExpr(1) * stepExpr);
+    auto actualIndex = affine::AffineApplyOp::create(
+        rewriter, op.getLoc(), actualIndexMap,
+        ValueRange({lower, affineFor.getInductionVar(), step}));
+    return std::make_pair(affineFor, actualIndex.getResult());
+  }
+
+  LogicalResult matchAndRewrite(scf::ForOp op,
+                                PatternRewriter &rewriter) const override {
+    if (!canRaiseToAffine(op))
+      return failure();
+
+    auto [affineFor, actualIndex] = createAffineFor(op, rewriter);
+    Block *affineBody = affineFor.getBody();
+
+    if (affineBody->mightHaveTerminator())
+      rewriter.eraseOp(affineBody->getTerminator());
+
+    SmallVector<Value> argValues;
+    argValues.push_back(actualIndex);
+    llvm::append_range(argValues, affineFor.getRegionIterArgs());
+    rewriter.inlineBlockBefore(op.getBody(), affineBody, affineBody->end(),
+                               argValues);
+
+    auto scfYieldOp = cast<scf::YieldOp>(affineBody->getTerminator());
+    rewriter.setInsertionPointToEnd(affineBody);
+    rewriter.replaceOpWithNewOp<affine::AffineYieldOp>(
+        scfYieldOp, scfYieldOp->getOperands());
+
+    rewriter.replaceOp(op, affineFor);
+    return success();
+  }
+};
+
+} // namespace
+
+void mlir::populateSCFToAffineConversionPatterns(RewritePatternSet &patterns) {
+  patterns.add<ForOpRewrite>(patterns.getContext());
+}
+
+void SCFToAffinePass::runOnOperation() {
+  MLIRContext &ctx = getContext();
+  RewritePatternSet patterns(&ctx);
+  populateSCFToAffineConversionPatterns(patterns);
+
+  // Configure conversion to raise SCF operations.
+  ConversionTarget target(ctx);
+  target.addDynamicallyLegalOp<scf::ForOp>(
+      [](scf::ForOp op) { return !canRaiseToAffine(op); });
+  target.markUnknownOpDynamicallyLegal([](Operation *) { return true; });
+  if (failed(
+          applyPartialConversion(getOperation(), target, std::move(patterns))))
+    signalPassFailure();
+}
diff --git a/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
new file mode 100644
index 0000000000000..2e2649ed8ef1c
--- /dev/null
+++ b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
@@ -0,0 +1,57 @@
+// RUN: mlir-opt -raise-scf-to-affine -split-input-file %s | FileCheck %s
+
+// CHECK: #[[$ATTR_0:.+]] = affine_map<(d0, d1)[s0] -> ((d1 - d0 + s0 - 1) floordiv s0)>
+// CHECK: #[[$ATTR_1:.+]] = affine_map<(d0, d1)[s0] -> (d0 + d1 * s0)>
+// CHECK: #[[$ATTR_2:.+]] = affine_map<(d0) -> (d0)>
+// CHECK-LABEL:   func.func @simple_loop(
+// CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
+// CHECK-SAME:      %[[ARG1:.*]]: memref<3xindex>) {
+// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
+// CHECK:           %[[VAL_1:.*]] = arith.constant 0 : index
+// CHECK:           %[[VAL_2:.*]] = arith.constant 1 : index
+// CHECK:           %[[VAL_3:.*]] = arith.constant 2 : index
+// CHECK:           %[[VAL_4:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_1]]] : memref<3xindex>
+// CHECK:           %[[VAL_5:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_2]]] : memref<3xindex>
+// CHECK:           %[[VAL_6:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_3]]] : memref<3xindex>
+// CHECK:           affine.for %[[VAL_7:.*]] = 0 to #[[$ATTR_0]](%[[VAL_4]], %[[VAL_5]]){{\[}}%[[VAL_6]]] {
+// CHECK:             %[[VAL_8:.*]] = affine.apply #[[$ATTR_1]](%[[VAL_4]], %[[VAL_7]]){{\[}}%[[VAL_6]]]
+// CHECK:             memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_8]]] : memref<?xi32>
+// CHECK:           }
+// CHECK:           return
+// CHECK:         }
+
+func.func @simple_loop(%arg0: memref<?xi32>, %arg1: memref<3xindex>) {
+  %c0_i32 = arith.constant 0 : i32
+  %c0 = arith.constant 0 : index
+  %c1 = arith.constant 1 : index
+  %c2 = arith.constant 2 : index
+  %0 = memref.load %arg1[%c0] : memref<3xindex>
+  %1 = memref.load %arg1[%c1] : memref<3xindex>
+  %2 = memref.load %arg1[%c2] : memref<3xindex>
+  scf.for %arg2 = %0 to %1 step %2 {
+    memref.store %c0_i32, %arg0[%arg2] : memref<?xi32>
+  }
+  return
+}
+
+// CHECK-LABEL:   func.func @loop_with_constant_step(
+// CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
+// CHECK-SAME:      %[[ARG1:.*]]: index,
+// CHECK-SAME:      %[[ARG2:.*]]: index) {
+// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
+// CHECK:           %[[VAL_1:.*]] = arith.constant 3 : index
+// CHECK:           affine.for %[[VAL_2:.*]] = #[[$ATTR_2]](%[[ARG1]]) to #[[$ATTR_2]](%[[ARG2]]) step 3 {
+// CHECK:             memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_2]]] : memref<?xi32>
+// CHECK:           }
+// CHECK:           return
+// CHECK:         }
+
+func.func @loop_with_constant_step(%arg0: memref<?xi32>, %arg1: index, %arg2: index) {
+  %c0_i32 = arith.constant 0 : i32
+  %c3 = arith.constant 3 : index
+  scf.for %arg3 = %arg1 to %arg2 step %c3 {
+    memref.store %c0_i32, %arg0[%arg3] : memref<?xi32>
+  }
+  return
+}
+

>From fe9698eccf94d64ceeca0f1d2d0bfb90e07a4ff5 Mon Sep 17 00:00:00 2001
From: yanming <ming.yan at terapines.com>
Date: Mon, 25 Aug 2025 13:53:06 +0800
Subject: [PATCH 2/7] Use `walkAndApplyPatterns` instead of
 `applyPartialConversion`

---
 mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
index 35e662d88b488..c8d250ab6e447 100644
--- a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
+++ b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
@@ -15,8 +15,8 @@
 #include "mlir/Dialect/Affine/IR/AffineOps.h"
 #include "mlir/Dialect/SCF/IR/SCF.h"
 #include "mlir/IR/Verifier.h"
-#include "mlir/Transforms/DialectConversion.h"
 #include "mlir/Transforms/Passes.h"
+#include "mlir/Transforms/WalkPatternRewriteDriver.h"
 
 namespace mlir {
 #define GEN_PASS_DEF_RAISESCFTOAFFINEPASS
@@ -124,13 +124,5 @@ void SCFToAffinePass::runOnOperation() {
   MLIRContext &ctx = getContext();
   RewritePatternSet patterns(&ctx);
   populateSCFToAffineConversionPatterns(patterns);
-
-  // Configure conversion to raise SCF operations.
-  ConversionTarget target(ctx);
-  target.addDynamicallyLegalOp<scf::ForOp>(
-      [](scf::ForOp op) { return !canRaiseToAffine(op); });
-  target.markUnknownOpDynamicallyLegal([](Operation *) { return true; });
-  if (failed(
-          applyPartialConversion(getOperation(), target, std::move(patterns))))
-    signalPassFailure();
+  walkAndApplyPatterns(getOperation(), std::move(patterns));
 }

>From cae55780a6678c2322e1892578d19a105218ade9 Mon Sep 17 00:00:00 2001
From: yanming <ming.yan at terapines.com>
Date: Mon, 25 Aug 2025 13:54:45 +0800
Subject: [PATCH 3/7] Add a nested loop test case.

---
 .../Conversion/SCFToAffine/scf-to-affine.mlir | 33 ++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
index 2e2649ed8ef1c..41504f987a216 100644
--- a/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
+++ b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
@@ -2,7 +2,6 @@
 
 // CHECK: #[[$ATTR_0:.+]] = affine_map<(d0, d1)[s0] -> ((d1 - d0 + s0 - 1) floordiv s0)>
 // CHECK: #[[$ATTR_1:.+]] = affine_map<(d0, d1)[s0] -> (d0 + d1 * s0)>
-// CHECK: #[[$ATTR_2:.+]] = affine_map<(d0) -> (d0)>
 // CHECK-LABEL:   func.func @simple_loop(
 // CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
 // CHECK-SAME:      %[[ARG1:.*]]: memref<3xindex>) {
@@ -34,6 +33,9 @@ func.func @simple_loop(%arg0: memref<?xi32>, %arg1: memref<3xindex>) {
   return
 }
 
+// -----
+
+// CHECK: #[[$ATTR_2:.+]] = affine_map<(d0) -> (d0)>
 // CHECK-LABEL:   func.func @loop_with_constant_step(
 // CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
 // CHECK-SAME:      %[[ARG1:.*]]: index,
@@ -55,3 +57,32 @@ func.func @loop_with_constant_step(%arg0: memref<?xi32>, %arg1: index, %arg2: in
   return
 }
 
+// -----
+
+// CHECK: #[[$ATTR_3:.+]] = affine_map<(d0) -> (d0)>
+// CHECK-LABEL:   func.func @nested_loop(
+// CHECK-SAME:      %[[ARG0:.*]]: memref<?x?xi32>,
+// CHECK-SAME:      %[[ARG1:.*]]: index,
+// CHECK-SAME:      %[[ARG2:.*]]: index) {
+// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
+// CHECK:           %[[VAL_1:.*]] = arith.constant 0 : index
+// CHECK:           %[[VAL_2:.*]] = arith.constant 1 : index
+// CHECK:           affine.for %[[VAL_3:.*]] = #[[$ATTR_3]](%[[VAL_1]]) to #[[$ATTR_3]](%[[ARG1]]) {
+// CHECK:             affine.for %[[VAL_4:.*]] = #[[$ATTR_3]](%[[VAL_1]]) to #[[$ATTR_3]](%[[ARG2]]) {
+// CHECK:               memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_3]], %[[VAL_4]]] : memref<?x?xi32>
+// CHECK:             }
+// CHECK:           }
+// CHECK:           return
+// CHECK:         }
+
+func.func @nested_loop(%arg0: memref<?x?xi32>, %arg1: index, %arg2: index) {
+  %c0_i32 = arith.constant 0 : i32
+  %c0 = arith.constant 0 : index
+  %c1 = arith.constant 1 : index
+  scf.for %arg3 = %c0 to %arg1 step %c1 {
+    scf.for %arg4 = %c0 to %arg2 step %c1 {
+      memref.store %c0_i32, %arg0[%arg3, %arg4] : memref<?x?xi32>
+    }
+  }
+  return
+}

>From a1ae744b319c8f28fdd47a1b7dcd6eb79d9bbe57 Mon Sep 17 00:00:00 2001
From: yanming <ming.yan at terapines.com>
Date: Mon, 25 Aug 2025 13:58:51 +0800
Subject: [PATCH 4/7] Add debugging information.

---
 mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
index c8d250ab6e447..ba47763af1486 100644
--- a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
+++ b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
@@ -23,6 +23,8 @@ namespace mlir {
 #include "mlir/Conversion/Passes.h.inc"
 } // namespace mlir
 
+#define DEBUG_TYPE "raise-scf-to-affine"
+
 using namespace mlir;
 
 namespace {
@@ -89,8 +91,11 @@ struct ForOpRewrite : public OpRewritePattern<scf::ForOp> {
 
   LogicalResult matchAndRewrite(scf::ForOp op,
                                 PatternRewriter &rewriter) const override {
-    if (!canRaiseToAffine(op))
+    if (!canRaiseToAffine(op)) {
+      LLVM_DEBUG(llvm::dbgs()
+                 << "[affine] Cannot raise scf op: " << op << "\n");
       return failure();
+    }
 
     auto [affineFor, actualIndex] = createAffineFor(op, rewriter);
     Block *affineBody = affineFor.getBody();

>From 836077406cd714856286162322ff316348374bb6 Mon Sep 17 00:00:00 2001
From: yanming <ming.yan at terapines.com>
Date: Mon, 25 Aug 2025 16:46:25 +0800
Subject: [PATCH 5/7] Simplify the code

---
 mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
index ba47763af1486..0166552bd40f3 100644
--- a/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
+++ b/mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
@@ -17,6 +17,7 @@
 #include "mlir/IR/Verifier.h"
 #include "mlir/Transforms/Passes.h"
 #include "mlir/Transforms/WalkPatternRewriteDriver.h"
+#include "llvm/Support/DebugLog.h"
 
 namespace mlir {
 #define GEN_PASS_DEF_RAISESCFTOAFFINEPASS
@@ -45,8 +46,9 @@ struct ForOpRewrite : public OpRewritePattern<scf::ForOp> {
 
   std::pair<affine::AffineForOp, Value>
   createAffineFor(scf::ForOp op, PatternRewriter &rewriter) const {
-    if (auto constantStep = op.getStep().getDefiningOp<arith::ConstantOp>()) {
-      int64_t step = cast<IntegerAttr>(constantStep.getValue()).getInt();
+    IntegerAttr constAttr;
+    if (matchPattern(op.getStep(), m_Constant(&constAttr))) {
+      int64_t step = constAttr.getInt();
       if (step > 0)
         return positiveConstantStep(op, step, rewriter);
     }
@@ -92,8 +94,7 @@ struct ForOpRewrite : public OpRewritePattern<scf::ForOp> {
   LogicalResult matchAndRewrite(scf::ForOp op,
                                 PatternRewriter &rewriter) const override {
     if (!canRaiseToAffine(op)) {
-      LLVM_DEBUG(llvm::dbgs()
-                 << "[affine] Cannot raise scf op: " << op << "\n");
+      LDBG() << "[affine] Cannot raise scf op: " << op << "\n";
       return failure();
     }
 

>From f76898e6f43cd03f87d6ec757ec88b3956b4f870 Mon Sep 17 00:00:00 2001
From: yanming <ming.yan at terapines.com>
Date: Mon, 25 Aug 2025 18:00:27 +0800
Subject: [PATCH 6/7] Fix test format.

---
 .../Conversion/SCFToAffine/scf-to-affine.mlir | 91 ++++++-------------
 1 file changed, 27 insertions(+), 64 deletions(-)

diff --git a/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
index 41504f987a216..22fc61ca6cca2 100644
--- a/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
+++ b/mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
@@ -1,87 +1,50 @@
 // RUN: mlir-opt -raise-scf-to-affine -split-input-file %s | FileCheck %s
 
-// CHECK: #[[$ATTR_0:.+]] = affine_map<(d0, d1)[s0] -> ((d1 - d0 + s0 - 1) floordiv s0)>
-// CHECK: #[[$ATTR_1:.+]] = affine_map<(d0, d1)[s0] -> (d0 + d1 * s0)>
-// CHECK-LABEL:   func.func @simple_loop(
-// CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
-// CHECK-SAME:      %[[ARG1:.*]]: memref<3xindex>) {
-// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
-// CHECK:           %[[VAL_1:.*]] = arith.constant 0 : index
-// CHECK:           %[[VAL_2:.*]] = arith.constant 1 : index
-// CHECK:           %[[VAL_3:.*]] = arith.constant 2 : index
-// CHECK:           %[[VAL_4:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_1]]] : memref<3xindex>
-// CHECK:           %[[VAL_5:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_2]]] : memref<3xindex>
-// CHECK:           %[[VAL_6:.*]] = memref.load %[[ARG1]]{{\[}}%[[VAL_3]]] : memref<3xindex>
-// CHECK:           affine.for %[[VAL_7:.*]] = 0 to #[[$ATTR_0]](%[[VAL_4]], %[[VAL_5]]){{\[}}%[[VAL_6]]] {
-// CHECK:             %[[VAL_8:.*]] = affine.apply #[[$ATTR_1]](%[[VAL_4]], %[[VAL_7]]){{\[}}%[[VAL_6]]]
-// CHECK:             memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_8]]] : memref<?xi32>
-// CHECK:           }
-// CHECK:           return
-// CHECK:         }
-
-func.func @simple_loop(%arg0: memref<?xi32>, %arg1: memref<3xindex>) {
+// CHECK: #[[$UB_MAP:.+]] = affine_map<(d0, d1)[s0] -> ((d1 - d0 + s0 - 1) floordiv s0)>
+// CHECK: #[[$IV_MAP:.+]] = affine_map<(d0, d1)[s0] -> (d0 + d1 * s0)>
+// CHECK-LABEL: @generic_loop
+// CHECK-SAME: %[[ARR:.*]]: memref<?xi32>, %[[LOWER:.*]]: index, %[[UPPER:.*]]: index, %[[STEP:.*]]: index
+func.func @generic_loop(%arr: memref<?xi32>, %lower: index, %upper: index, %step: index) {
+// CHECK: affine.for %[[IV:.*]] = 0 to #[[$UB_MAP]](%[[LOWER]], %[[UPPER]])[%[[STEP]]] {
+// CHECK:   %[[IDX:.*]] = affine.apply #[[$IV_MAP]](%[[LOWER]], %[[IV]])[%[[STEP]]]
+// CHECK:   memref.store %{{.*}}, %[[ARR]][%[[IDX]]] : memref<?xi32>
+// CHECK: }
   %c0_i32 = arith.constant 0 : i32
-  %c0 = arith.constant 0 : index
-  %c1 = arith.constant 1 : index
-  %c2 = arith.constant 2 : index
-  %0 = memref.load %arg1[%c0] : memref<3xindex>
-  %1 = memref.load %arg1[%c1] : memref<3xindex>
-  %2 = memref.load %arg1[%c2] : memref<3xindex>
-  scf.for %arg2 = %0 to %1 step %2 {
-    memref.store %c0_i32, %arg0[%arg2] : memref<?xi32>
+  scf.for %idx = %lower to %upper step %step {
+    memref.store %c0_i32, %arr[%idx] : memref<?xi32>
   }
   return
 }
 
 // -----
 
-// CHECK: #[[$ATTR_2:.+]] = affine_map<(d0) -> (d0)>
-// CHECK-LABEL:   func.func @loop_with_constant_step(
-// CHECK-SAME:      %[[ARG0:.*]]: memref<?xi32>,
-// CHECK-SAME:      %[[ARG1:.*]]: index,
-// CHECK-SAME:      %[[ARG2:.*]]: index) {
-// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
-// CHECK:           %[[VAL_1:.*]] = arith.constant 3 : index
-// CHECK:           affine.for %[[VAL_2:.*]] = #[[$ATTR_2]](%[[ARG1]]) to #[[$ATTR_2]](%[[ARG2]]) step 3 {
-// CHECK:             memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_2]]] : memref<?xi32>
-// CHECK:           }
-// CHECK:           return
-// CHECK:         }
-
-func.func @loop_with_constant_step(%arg0: memref<?xi32>, %arg1: index, %arg2: index) {
+// CHECK: #[[$MAP:.+]] = affine_map<(d0) -> (d0)>
+// CHECK-LABEL: @loop_with_constant_step
+// CHECK-SAME: %[[ARR:.*]]: memref<?xi32>, %[[LOWER:.*]]: index, %[[UPPER:.*]]: index
+func.func @loop_with_constant_step(%arr: memref<?xi32>, %lower: index, %upper: index) {
+// CHECK: affine.for %[[IDX:.*]] = #[[$MAP]](%[[LOWER]]) to #[[$MAP]](%[[UPPER]]) step 3 {
+// CHECK:   memref.store %{{.*}}, %[[ARR]][%[[IDX]]] : memref<?xi32>
+// CHECK: }
   %c0_i32 = arith.constant 0 : i32
   %c3 = arith.constant 3 : index
-  scf.for %arg3 = %arg1 to %arg2 step %c3 {
-    memref.store %c0_i32, %arg0[%arg3] : memref<?xi32>
+  scf.for %idx = %lower to %upper step %c3 {
+    memref.store %c0_i32, %arr[%idx] : memref<?xi32>
   }
   return
 }
 
 // -----
 
-// CHECK: #[[$ATTR_3:.+]] = affine_map<(d0) -> (d0)>
-// CHECK-LABEL:   func.func @nested_loop(
-// CHECK-SAME:      %[[ARG0:.*]]: memref<?x?xi32>,
-// CHECK-SAME:      %[[ARG1:.*]]: index,
-// CHECK-SAME:      %[[ARG2:.*]]: index) {
-// CHECK:           %[[VAL_0:.*]] = arith.constant 0 : i32
-// CHECK:           %[[VAL_1:.*]] = arith.constant 0 : index
-// CHECK:           %[[VAL_2:.*]] = arith.constant 1 : index
-// CHECK:           affine.for %[[VAL_3:.*]] = #[[$ATTR_3]](%[[VAL_1]]) to #[[$ATTR_3]](%[[ARG1]]) {
-// CHECK:             affine.for %[[VAL_4:.*]] = #[[$ATTR_3]](%[[VAL_1]]) to #[[$ATTR_3]](%[[ARG2]]) {
-// CHECK:               memref.store %[[VAL_0]], %[[ARG0]]{{\[}}%[[VAL_3]], %[[VAL_4]]] : memref<?x?xi32>
-// CHECK:             }
-// CHECK:           }
-// CHECK:           return
-// CHECK:         }
-
-func.func @nested_loop(%arg0: memref<?x?xi32>, %arg1: index, %arg2: index) {
+// CHECK-LABEL: @nested_loop
+func.func @nested_loop(%arg0: memref<?x?xi32>, %upper1: index, %upper2: index) {
+// CHECK: affine.for
+// CHECK:   affine.for
   %c0_i32 = arith.constant 0 : i32
   %c0 = arith.constant 0 : index
   %c1 = arith.constant 1 : index
-  scf.for %arg3 = %c0 to %arg1 step %c1 {
-    scf.for %arg4 = %c0 to %arg2 step %c1 {
-      memref.store %c0_i32, %arg0[%arg3, %arg4] : memref<?x?xi32>
+  scf.for %i = %c0 to %upper1 step %c1 {
+    scf.for %j = %c0 to %upper2 step %c1 {
+      memref.store %c0_i32, %arg0[%i, %j] : memref<?x?xi32>
     }
   }
   return

>From 6ad4b56cc3bdbb1ce0674df5750d0a21483c8606 Mon Sep 17 00:00:00 2001
From: Ming Yan <nexming7 at gmail.com>
Date: Mon, 25 Aug 2025 23:53:36 +0800
Subject: [PATCH 7/7] Add a description for the pass.

---
 mlir/include/mlir/Conversion/Passes.td | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 57f726356cbbf..0f7b2654609b4 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -1032,7 +1032,24 @@ def ReconcileUnrealizedCastsPass : Pass<"reconcile-unrealized-casts"> {
 //===----------------------------------------------------------------------===//
 
 def RaiseSCFToAffinePass : Pass<"raise-scf-to-affine"> {
-  let summary = "Raise SCF to affine ops";
+  let summary = "Raise SCF operations to affine operations where possible";
+  let description = [{
+    This pass raises SCF operations to affine operations where possible.
+
+    Specifically:
+      - `scf.for` loops with affine-compatible bounds and steps are
+        converted to `affine.for`.
+
+    This transformation enables subsequent affine-specific optimizations
+    such as loop tiling, unrolling, vectorization, and memory access
+    optimizations.
+
+    Note:
+      - Only loops that are statically affine can be converted;
+        non-affine loops remain in SCF form.
+      - This pass does not modify memory accesses; consider using
+        --affine-raise-from-memref for converting `memref.load`/`store`.
+  }];
   let dependentDialects = [
     "affine::AffineDialect",
     "scf::SCFDialect",



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