[Mlir-commits] [mlir] [MLIR][XeGPU] Scattered ops sg-to-wi distribution (PR #154949)
Artem Kroviakov
llvmlistbot at llvm.org
Sat Aug 23 02:14:46 PDT 2025
akroviakov wrote:
> Instead I think offsets and masks must be distributed.
This is the main difference between scattered ops and nd ops.
1. We do not have an intrinsic beneath these ops, that would provide clear rules (i.e., describe the structure) of a load/store.
2. We do not have a single offset that defines a base pointer for a 2D shape whose structure we could describe using a layout attribute.
**The offsets are the layout**.
The documentation does not prevent me from supplying a completely unstructured vector of offsets (e.g., `[0, 5, 2, 11, 1]`), it only says that the op needs SG-size vector of offsets:
> - `offsets`: represents offsets from source. required if `source` in not a TensorDescType.
offsets is a vector of `index` type and vector length is either the subgroup size
or 1 in SIMT mode. scalar offset is also valid for SIMT mode.
Therefore, we cannot "distribute" such vector based on `lane_layout = [1, N]`. How would that look for the above unstructured vector? And if we could distribute, why do we need _a vector_ of offsets at SG level?
The same applies to the mask, one can supply any random vector of `i1`. How do we convey that lane 0 is 1, but lane 3 is 1 in pure SIMT?
The offsets/mask vectors are not SG-uniform, and they are allowed to be unstructured. What is distribution supposed to do with them at compile time, in your opinion?
https://github.com/llvm/llvm-project/pull/154949
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