[Mlir-commits] [mlir] [MLIR][XeGPU] Update XeGPU create_tdesc, update_offset, load, store and prefetch. (PR #154653)
Sang Ik Lee
llvmlistbot at llvm.org
Thu Aug 21 09:47:54 PDT 2025
silee2 wrote:
> Btw, what is the reason to demand vector offsets in the op definition? For SIMT distribution, given a vector of SIMD offsets, we would need to extract an element from 1D vector at lane idx, to my understanding. [`vector.extract`](https://mlir.llvm.org/docs/Dialects/Vector/#vectorextract-vectorextractop) says:
>
> > the result degenerates to a scalar element.
>
> Why do we need to make extra steps for wrapping `vector.extract` result into a vector and then get the scalar back via [materializations](https://github.com/llvm/llvm-project/pull/154556), if we could allow scalar elements in the first place? Do we prohibit users from supplying a single-element offset/mask vector at WG level code somehow? If not, then how is it different from passing a scalar?
I tried not to change op definition as much as possible but agree with you on this one. `vector.extract` and `vector.insert` may get optimized away later, but better to not introduce the problem to begin with. And the change will not break any exsiting cases. Updated PR to allow scalar offset for load/store/prefetch.
https://github.com/llvm/llvm-project/pull/154653
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