[Mlir-commits] [mlir] [MLIR][NVVM] Improve inline_ptx, add readwrite support (PR #154358)

[Guray Ozen]

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@@ -124,19 +124,21 @@ def BasicPtxBuilderOpInterface : OpInterface<"BasicPtxBuilderInterface"> {
             following this order:
              1) Adds results 
              2) Adds operands 
-             3) Adds attributes             
+             3) Adds attributes
+             Returns true if the OP is going to do register mapping itself
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grypp wrote:

Current comment is correct. If an op has its own `getAsmValues` implementation and not using Interface's implementation, it might want to skip automatic register mapping.

Currently, manual mapping is only used by `wgmma.mma_async`, but I plan to remove that as well so all ops rely on automatic mapping.


https://github.com/llvm/llvm-project/pull/154358