[Mlir-commits] [mlir] [MLIR][NVVM][NVGPU] Combine prefetch and prefetch.tensormap (PR #153134)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Thu Aug 21 00:17:02 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
index d15c147d4..30b27a789 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
@@ -1876,7 +1876,7 @@ llvm::Intrinsic::ID PrefetchOp::getIntrinsicID(NVVM::PrefetchOp &op) {
unsigned addressSpace =
llvm::cast<LLVM::LLVMPointerType>(op.getAddr().getType())
.getAddressSpace();
-
+
if (op.getTensormap())
return llvm::Intrinsic::nvvm_prefetch_tensormap;
@@ -1897,7 +1897,7 @@ llvm::Intrinsic::ID PrefetchOp::getIntrinsicID(NVVM::PrefetchOp &op) {
switch (addressSpace) {
case MemSpace::kGenericMemorySpace:
return *cacheLevel == CacheLevel::L1 ? llvm::Intrinsic::nvvm_prefetch_L1
- : llvm::Intrinsic::nvvm_prefetch_L2;
+ : llvm::Intrinsic::nvvm_prefetch_L2;
case MemSpace::kGlobalMemorySpace:
return *cacheLevel == CacheLevel::L1
? llvm::Intrinsic::nvvm_prefetch_global_L1
``````````
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https://github.com/llvm/llvm-project/pull/153134
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