[Mlir-commits] [mlir] [mlir][AMDGPU] Add PermlaneOp (PR #154345)
Tim Gymnich
llvmlistbot at llvm.org
Wed Aug 20 02:08:03 PDT 2025
================
@@ -656,6 +656,37 @@ def AMDGPU_SwizzleBitModeOp : AMDGPU_Op<"swizzle_bitmode",
}];
}
+def AMDGPU_PermlanePerm : I32EnumAttr<"PermlanePerm",
+ "The possible permutations for a permlane operation",
+ [
+ I32EnumAttrCase<"swap_16", 0>,
+ I32EnumAttrCase<"swap_32", 1>,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::amdgpu";
+}
+
+def AMDGPU_PermlanePermAttr : EnumAttr<AMDGPU_Dialect, AMDGPU_PermlanePerm,
+ "permlane_perm">;
+
+def AMDGPU_PermlaneOp : AMDGPU_Op<"permlane", [Pure, AllTypesMatch<["result", "src"]>]>,
+Arguments<(ins AnyIntegerOrFloatOr1DVector:$src,
+ AMDGPU_PermlanePermAttr:$kind,
+ DefaultValuedAttr<BoolAttr, "false">:$fi,
+ DefaultValuedAttr<BoolAttr, "false">:$bound_ctrl)> {
+ let summary = "AMDGPU permlane op";
+ let description = [{
+ High-level wrapper on `rocdl.permlane` variants.
+
+ Supports arbitrary int/float/vector types, which will be repacked to i32 and
+ one or more `rocdl.permlane` ops during lowering.
----------------
tgymnich wrote:
done
https://github.com/llvm/llvm-project/pull/154345
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