[Mlir-commits] [mlir] [mlir][AMDGPU] Add PermlaneOp (PR #154345)
Jakub Kuderski
llvmlistbot at llvm.org
Tue Aug 19 09:56:19 PDT 2025
================
@@ -656,6 +656,37 @@ def AMDGPU_SwizzleBitModeOp : AMDGPU_Op<"swizzle_bitmode",
}];
}
+def AMDGPU_PermlanePerm : I32EnumAttr<"PermlanePerm",
+ "The possible permutations for a permlane operation",
+ [
+ I32EnumAttrCase<"swap_16", 0>,
+ I32EnumAttrCase<"swap_32", 1>,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::amdgpu";
+}
+
+def AMDGPU_PermlanePermAttr : EnumAttr<AMDGPU_Dialect, AMDGPU_PermlanePerm,
+ "permlane_perm">;
+
+def AMDGPU_PermlaneOp : AMDGPU_Op<"permlane", [Pure, AllTypesMatch<["result", "src"]>]>,
----------------
kuhar wrote:
Is this truly `Pure`? Can hoisting outside of loops affect the semantics? I think it should be fine in structured control flow but I would like to double check with @krzysz00 / @Hardcode84
https://github.com/llvm/llvm-project/pull/154345
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