[Mlir-commits] [mlir] [MLIR][NVVM] Update prefetch.tensormap Op (PR #153134)

[Srinivasa Ravi]

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@@ -25,9 +25,11 @@ include "mlir/Dialect/LLVMIR/LLVMTypes.td"
 def LLVM_PointerGeneric : LLVM_PointerInAddressSpace<0>;
 def LLVM_PointerGlobal : LLVM_PointerInAddressSpace<1>;
 def LLVM_PointerShared : LLVM_PointerInAddressSpace<3>;
+def LLVM_PointerConst : LLVM_PointerInAddressSpace<4>;
 def LLVM_PointerLocal : LLVM_PointerInAddressSpace<5>;
 def LLVM_PointerTensor : LLVM_PointerInAddressSpace<6>;
 def LLVM_PointerSharedCluster : LLVM_PointerInAddressSpace<7>;
+def LLVM_PointerParam : LLVM_PointerInAddressSpace<101>;
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Wolfram70 wrote:

In the NVPTX backend, it looks like it is treated as being address space 101 (defined in [NVPTXAddrSpace.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/NVPTXAddrSpace.h)). So I think we have define it this way in MLIR too to get it to lower to the right intrinsic variant (`llvm.nvvm.prefetch.tensormap.p101`).

https://github.com/llvm/llvm-project/pull/153134