[Mlir-commits] [mlir] [MLIR][XeGPU] Distribute create_nd_desc op without offset from Wg to Sg (PR #152351)

Jianhui Li llvmlistbot at llvm.org
Thu Aug 7 19:05:47 PDT 2025


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@@ -363,7 +383,7 @@ gpu.func @dpas_no_sg_data(%a: memref<128x128xf16>, %b: memref<128x128xf16>) {
         // CHECK: %[[SGID:.*]] = gpu.subgroup_id : index
         // CHECK: %[[C3:.*]] = arith.constant 3 : index
         // CHECK: %[[SUB:.*]] = index.sub %{{.*}}, %[[C3]]
-        %td = xegpu.create_nd_tdesc %src1[0, 0] : memref<128x64xf32>
+        %td = xegpu.create_nd_tdesc %src1[%cst0, %cst0] : memref<128x64xf32>
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Jianhui-Li wrote:

what's the reason for the change (0->%cst0)? 

https://github.com/llvm/llvm-project/pull/152351


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